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Decoupling caps placed right next to the IC but still seeing power rail noise

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Original Question

Asked by soggy_waffle42 ·

Fast digital board, MCU running a few hundred MHz core clock plus a couple of high-speed peripherals. Put 100 nF caps right next to every power pin like I always do, vias straight down to the ground plane, did everything by the book. Still seeing noticeable ripple on the power rail on the scope when the peripherals are active.

Caps are the right value for the IC per datasheet. Placement looks textbook-correct to me. Where else would I even be losing margin here.

From the knowledge baseHow Should You Place Decoupling Capacitors on a PCB?

2 Replies

grumpy_otter7
Accepted Answer

If individual cap placement is genuinely correct, the next thing I'd check is the ground via itself, not the capacitor. A decoupling cap with a perfect loop on paper but a single ground via shared with several other components, or a via that lands on a ground plane with a gap or split nearby, still has more loop inductance than it looks like from the placement alone.

A few specific things to check:

  • Does each decoupling cap have its own dedicated via to ground, or are several caps sharing one via through a short trace? Sharing reintroduces inductance you thought you'd eliminated by placing the cap close in the first place.
  • Is the ground plane actually solid and continuous directly under that section, or is there a gap, slot, or another via field interrupting it nearby? (Worth checking after any later placement change — see the 4-layer stack-up thread for how easy this is to introduce without noticing.)
  • Are you decoupling with only the one value the datasheet specifies, or do the active peripherals draw current at a frequency range the single cap value doesn't cover well? A second, smaller-value cap in parallel sometimes recovers margin a single value leaves on the table.

Datasheet-correct value and "looks close on the layout" get you most of the way, but the via and plane continuity is where the remaining noise margin usually hides.

beans4dinner

Worth checking one level up from the local decoupling too: how's the bulk capacitance on the main power input feeding this whole rail? Local decoupling handles the nanosecond-scale demand right at the pin. If the upstream regulator or bulk cap can't keep the rail itself steady once several peripherals draw current at once, you'll see ripple that no amount of perfect local decoupling fixes, because it's not a local problem.

Quick check: does the ripple track with how many peripherals are simultaneously active, or is it roughly constant regardless of load? If it scales with simultaneous load, look at bulk capacitance and regulator transient response before spending more time on individual decoupling caps that are already correctly placed.

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