How Should You Place Decoupling Capacitors on a PCB?

Detailed Explanation

A decoupling (or bypass) capacitor's job is to act as a local, fast-responding charge reservoir for an IC's power pin, supplying the brief, high-frequency current spikes that occur when internal logic switches — current that the board's external power supply and power plane, both relatively slow and inductive at high frequency, can't deliver fast enough on their own. The capacitor only does this job well if the loop it forms — power pin, through the capacitor, to ground, and back to the IC's ground pin — is physically short and low-inductance, because that loop's inductance directly limits how quickly the capacitor can respond.

This is why "decoupling capacitor placement" is really a routing-loop problem, not just a "put a capacitor somewhere on this net" problem. A capacitor that's electrically connected to the right power pin but placed several centimetres away, or connected through a long, narrow trace instead of a short hop to a ground plane via, provides far less effective decoupling than the same capacitor placed immediately adjacent with a direct via down to ground.

Practical Examples

A microcontroller with several power pins typically needs a decoupling capacitor at each one, placed directly beside that specific pin — not one larger capacitor placed centrally and connected to all pins by a shared trace, which reintroduces the loop-length problem decoupling is meant to solve.

On a board where the same IC's decoupling capacitor was originally placed close but later got pushed aside during a placement revision to make room for a connector, the resulting longer loop can reintroduce power rail noise that wasn't present in the earlier layout — even though the capacitor, value, and net are all unchanged; this is exactly the kind of regression worth checking for explicitly after a placement change rather than assuming.

Design Considerations

• Place the capacitor on the same side of the board as the IC where possible, and route directly to the pin rather than via a long trace shared with other connections.
• Use a dedicated via straight down to the ground plane immediately beside the capacitor's ground pad, rather than relying on a routed ground trace, to minimise the return-path loop inductance.
• Follow the IC datasheet's recommended capacitor values and placement guidance when one is given — manufacturers often validate specific values against their part's actual switching behaviour.
• Re-verify decoupling placement after any later layout revision that moves components around — a previously-correct placement can be silently degraded by an unrelated later change.
• Power integrity at scale: For production-targeted boards where power delivery noise directly affects system reliability, professional PCB layout services include power integrity review as part of the placement and routing process.

Common Mistakes

• Placing a decoupling capacitor "on the same net" but physically distant from the power pin it's meant to protect, defeating the short-loop requirement that makes it effective.
• Sharing a single capacitor across multiple power pins via a common trace instead of giving each pin its own capacitor with its own short loop.
• Connecting the capacitor's ground pad to a ground trace instead of a direct via to the ground plane, adding avoidable loop inductance.
• Assuming decoupling placement is "done" once and never re-checking it after a later placement revision moves the capacitor or the IC.