ICM-42688-P INT1 never fires after FIFO setup — FIFO count stuck at 0x0000 but WHO_AM_I reads back correctly

Two registers not written. The first is why your FIFO count is permanently 0.

1. FIFO_CONFIG (register 0x16) is still in BYPASS mode.

FIFO_CONFIG defaults to 0x00. Bits [7:6] = 00 means FIFO_MODE = BYPASS — the FIFO is physically disabled. Sensor data goes only to the output registers (0x1D onwards); none of it reaches the FIFO regardless of what you've written to FIFO_CONFIG1. That explains why FIFO_COUNTH/L stays at 0 while the output registers are live.

To enable FIFO, write one of:

• 0x40 (FIFO_MODE = 01 = STOP-ON-FULL): FIFO captures data until full, then pauses. Preserves your oldest samples. Good for fixed-rate burst reads.
• 0xC0 (FIFO_MODE = 11 = STREAM): FIFO continuously overwrites oldest data once full. Good for interrupt-driven reads where you drain at the watermark.

For 1 kHz with interrupts, STREAM mode (0xC0) is the usual choice.

2. INT_SOURCE0 (register 0x65) defaults to 0x00 — no interrupts are routed to INT1.

Even with the FIFO running, INT1 will not assert until you write the FIFO_FULL_INT1_EN or FIFO_THS_INT1_EN bit in INT_SOURCE0. Default is all-zeros, so INT1 is silent regardless of FIFO state. Check DS-000347 Table 14.34 for the exact bit positions and write the appropriate enable.

If you're using the watermark threshold interrupt (FIFO_THS), also configure the watermark byte count in FIFO_CONFIG2 (0x60) and FIFO_CONFIG3 (0x61) before relying on that interrupt. If you just want FIFO_FULL, skip the watermark registers for now.

Corrected minimal init for FIFO + INT1 in STREAM mode:

icm_write(0x11, 0x01);    // DEVICE_CONFIG: soft reset
delay_ms(10);              // wait for reset to complete

icm_write(0x4E, 0x0F);    // PWR_MGMT0: accel LN + gyro LN
// Gyro startup: datasheet specifies ~45 ms typical from power-on to stable output.
// You can write the remaining config during this window.

icm_write(0x50, 0x46);    // ACCEL_CONFIG0: ±4g, 1 kHz ODR (verify FS bits in DS-000347)
icm_write(0x4F, 0x06);    // GYRO_CONFIG0: ±2000°/s, 1 kHz ODR

icm_write(0x5F, 0x03);    // FIFO_CONFIG1: accel + gyro data into FIFO

icm_write(0x16, 0xC0);    // FIFO_CONFIG: STREAM mode  <-- THIS IS WHAT YOU'RE MISSING

// Enable FIFO interrupt on INT1 — see INT_SOURCE0 (0x65), DS-000347 Table 14.34
icm_write(0x65, <FIFO_FULL_INT1_EN or FIFO_THS_INT1_EN>);  // <-- THIS IS ALSO MISSING

After writing 0xC0 to FIFO_CONFIG, poll FIFO_COUNTL after ~50 ms and it should be incrementing. Once the count is moving, add the INT_SOURCE0 write and INT1 will start firing.

The accelerometer and IMU guide covers FIFO benefits for real-time orientation tracking if you want the background on why the FIFO mode matters for sensor fusion pipelines.