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How Do You Limit Inrush Current When a Board Is Hot-Plugged or Powered On?

Last updated 5 July 2026 · 6 min read

Direct Answer

Inrush current — the brief, high-amplitude current surge that flows into a board's bulk capacitance the instant power is applied or a connector is hot-plugged onto a live bus — is limited with a hot-swap controller IC (for boards plugged into a live, shared power bus) or a simpler load switch IC with a controlled turn-on ramp (for boards powered up alongside the rest of the system). Both work by inserting a MOSFET in series with the incoming power rail and actively controlling its gate voltage during turn-on, so the output ramps up over a controlled time (soft start) instead of slamming the full bus voltage onto discharged bulk capacitance in microseconds — which is what causes connector arcing, bus voltage sag affecting other boards, and inrush currents that can exceed a fuse's rating or a MOSFET's safe operating area.

Detailed Explanation

Every board has bulk decoupling and bus capacitance — often tens to hundreds of microfarads once every decoupling capacitor, bulk capacitor, and converter input capacitor is added up. If the full supply voltage is applied to that discharged capacitance instantaneously (either at power-on, or the moment a hot-pluggable board's connector makes contact with a live backplane or shared bus), the capacitor briefly looks like a near-short circuit. The resulting current spike — inrush current — can reach tens or hundreds of amps for a few microseconds to milliseconds, even though the board's actual steady-state current draw might only be a few hundred milliamps.

This matters for three practical reasons: the inrush current can exceed a connector's rated current and cause pin damage or arcing during live insertion, it can pull the shared bus voltage down enough to disturb every other board already operating on that bus, and it can exceed the safe operating area of any series MOSFET, fuse, or PTC in the power path — devices sized correctly for steady-state current can still be damaged by a large enough inrush transient.

This is a distinct problem from steady-state regulator selection (see linear vs switching regulator) — inrush limiting is about controlling the first few milliseconds of power application, before the downstream regulator is even running in regulation.

How Inrush Current Limiting Works

Both hot-swap controllers and load switch ICs solve this the same fundamental way: a MOSFET is placed in series with the incoming power rail, and its gate is actively driven so that the MOSFET behaves as a controlled variable resistor during turn-on rather than an instant short. The series MOSFET's drain-source voltage drops gradually from the full supply voltage toward zero as the output ramps up — meaning the MOSFET itself dissipates significant power during the transition (V_DS × I_D), which is why sizing the ramp time and verifying the MOSFET's safe operating area against the datasheet's SOA curve is a core part of the design, not an afterthought.

Two related but distinct control strategies are used:

  • Soft-start ramp control: the gate voltage (and hence the series MOSFET's effective resistance) is ramped on a fixed timer, regardless of the actual current drawn — simple and adequate for load switch ICs powering a known, bounded downstream load.
  • Active current limiting: the controller continuously monitors current through a sense resistor and actively adjusts the series MOSFET's gate voltage to hold current at (or below) a programmed limit for as long as the downstream capacitance needs to charge — this is the approach used by true hot-swap controllers, because a live-insertion board's actual downstream capacitance and fault conditions aren't always known in advance the way they are in a load-switch application.

Hot-Swap Controller vs Load Switch IC

Load switch ICHot-swap controller
Typical use casePowering a sub-circuit on/off within an already-powered systemLive insertion of a board onto an already-energised shared bus
Turn-on behaviourFixed-time rampActively current-limited until fully charged, regardless of time
Fault handlingBasic overcurrent/thermal shutdownContinuous current limit + electronic circuit breaker, often with fault reporting
Typical partsTI TPS22918, Diodes Inc AP2281, ON Semi NCP45560Analog Devices/LTC LTC4218, TI LM5069, Analog Devices ADM1176
Series elementUsually integrated MOSFETUsually an external MOSFET sized for the application, driven by the controller

Design Considerations

  • Verify the series MOSFET's safe operating area (SOA), not just its steady-state current rating. During the inrush-limiting interval, the MOSFET simultaneously carries high current and drops significant voltage — a combination that the datasheet's continuous-current rating alone doesn't capture. Check the actual V_DS × I_D × time trajectory against the manufacturer's pulsed SOA curve, and add thermal margin per thermal design and heatsink selection for a power component if the MOSFET dissipates meaningfully during normal (non-fault) operation.
  • Set the current limit above worst-case steady-state load, with margin, but below the connector and downstream component ratings. A limit set too close to normal operating current causes nuisance trips during legitimate load transients; a limit set too high defeats the purpose of protecting the connector and bus.
  • Consider whether the application needs true hot-swap capability or just power sequencing. If the board is always powered up together with the rest of the system (never live-inserted), a simpler load-switch IC with a soft-start ramp is usually sufficient and lower cost than a full hot-swap controller.
  • Account for downstream capacitance changes over the product's life. A board redesign that adds capacitance downstream of the hot-swap circuit (more decoupling, an added sub-board) increases the required charge time and peak dissipation — re-verify the inrush design after any significant change to downstream bulk capacitance.

Zeus Design's electronics design team specifies and verifies hot-swap and inrush-limiting circuits for products with hot-pluggable modules or shared power buses — get in touch with Zeus Design if your product needs a live-insertion power stage designed and tested.

Common Mistakes

  • Sizing the series MOSFET for steady-state current only. The MOSFET's worst-case stress happens during the inrush-limiting interval, not steady-state operation — a part that's comfortably rated for continuous current can still fail if its pulsed safe operating area is exceeded during every power-on or hot-plug event.
  • Using a fixed-ramp load switch IC for a true live-insertion application. A load switch's fixed-time ramp doesn't adapt to an unexpectedly large downstream capacitance or a fault condition the way an active current-limiting hot-swap controller does — using the wrong device class for a live-bus application risks exactly the connector damage and bus disturbance the circuit was meant to prevent.
  • Ignoring bus voltage sag on other boards sharing the same supply. Even with local inrush limiting on the newly inserted board, drawing the maximum allowed inrush current for the full ramp duration can still sag a shared bus enough to reset or glitch other boards — check the aggregate effect on system-level power distribution, not just the single board in isolation.
  • Relying on a fuse alone for inrush protection. A fuse sized for steady-state current protection generally isn't fast enough, or is significantly derated, against the very short but very high amplitude of an inrush transient — a fuse is a backstop against a sustained fault, not a substitute for active inrush limiting.
  • Not testing hot-plug behaviour with a representative bus impedance and cable length. Bench testing with a stiff, low-impedance lab supply doesn't reproduce the voltage sag and ringing seen on a real shared bus with cable inductance and multiple boards already connected — validate on representative hardware before committing to production.

Frequently Asked Questions

What's the difference between a hot-swap controller and a simple load switch IC?
A load switch IC (e.g. TI TPS22918, Diodes Inc AP2281) is a simpler part intended for powering a sub-circuit on and off within a system that's already powered — it provides a controlled turn-on ramp and basic overcurrent/thermal protection, but is not designed to survive being connected to a live, already-energised bus. A hot-swap controller (e.g. LTC4218, LM5069, ADM1176) is designed specifically for the live-insertion case: it actively regulates the pass MOSFET to hold inrush current at a programmed limit for as long as needed (not just a fixed ramp time), monitors for a fault (short circuit, overcurrent, overtemperature) throughout operation, and often includes electronic circuit-breaker functionality that latches off and requires a restart after a fault, rather than just current-limiting momentarily.
Can I just use a resistor or thermistor instead of an active circuit?
For low-power, cost-sensitive applications, a simple NTC inrush-limiting thermistor (which presents high resistance when cold and low resistance once self-heated by the inrush current) is a common, low-cost solution — it's widely used in offline AC-DC supplies. It has real limitations for board-level DC hot-swap applications, though: it doesn't actively limit current to a precise value, its resistance-vs-temperature recovery time after a power cycle can leave it unable to limit a second inrush event correctly if power is cycled quickly, and it provides no fault protection (short circuit, overcurrent) beyond the one-time inrush event. For any application where connector damage, bus voltage sag, or safety is a real concern, an active hot-swap or load-switch IC is the more robust choice.
How do I choose the soft-start ramp time?
The ramp time is a trade-off: a longer ramp reduces peak inrush current (lower peak power dissipation in the series pass MOSFET, less bus voltage sag) but leaves the downstream board unpowered for longer and requires the pass MOSFET to survive a longer period of simultaneous high voltage and current (higher total energy dissipation during the ramp, which is often the actual design constraint via the MOSFET's safe operating area). Typical ramp times range from under 1 ms for a small board with modest bulk capacitance to tens of milliseconds for a board with large bulk capacitance or a strict inrush current limit. Most hot-swap controller datasheets provide a design equation relating the timing capacitor, target inrush current, and downstream bulk capacitance directly.

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