What Is the Difference Between USB 2.0, USB 3.x, and USB4?
Last updated 2 July 2026 · 7 min read
Direct Answer
USB 2.0 tops out at 480 Mbit/s (High Speed) and remains the right default for most embedded microcontroller applications — CDC-ACM serial, HID, DFU firmware updates — because it needs only a two-wire D+/D– differential pair and is natively supported by the vast majority of MCUs with integrated USB. USB 3.x adds a SuperSpeed channel (5 Gbit/s for 3.2 Gen 1, 10 Gbit/s for Gen 2, 20 Gbit/s for Gen 2x2) over two additional differential pairs, needed only when the product genuinely moves bulk data — high-resolution cameras, external storage, or high-bandwidth sensor streaming. USB4 (40–80 Gbit/s, built on the Thunderbolt 3 protocol) is essentially irrelevant to microcontroller-based embedded design — it targets PC-class host/peripheral links, tunnels DisplayPort and PCIe, and requires PHY complexity far beyond what any MCU vendor currently integrates.
Detailed Explanation
For nearly every microcontroller-based embedded product, the USB version decision is simpler than the marketing names suggest: use USB 2.0 unless the application specifically requires sustained multi-hundred-megabit throughput, in which case the design has almost certainly moved from "an MCU with a USB peripheral" to "an applications processor with a dedicated USB 3.x PHY" — a materially different hardware class. For USB protocol fundamentals (descriptors, classes, enumeration), see What Is USB?; for the physical CC-line and connector design of a USB-C port, see How Do You Design a USB-C Port on a PCB?.
Speed Tiers at a Glance
| Standard | Marketing name(s) | Max data rate | Signal pairs | Typical embedded use |
|---|---|---|---|---|
| USB 1.1 | Low Speed / Full Speed | 1.5 Mbit/s / 12 Mbit/s | 1 (D+/D–) | Legacy HID; largely superseded by USB 2.0 FS on modern MCUs |
| USB 2.0 | High Speed | 480 Mbit/s | 1 (D+/D–) | CDC-ACM debug serial, HID, DFU, mass storage — the default for MCU-based designs |
| USB 3.2 Gen 1 | (formerly USB 3.0) | 5 Gbit/s | 1 SuperSpeed pair + USB 2.0 pair | External storage, cameras, high-bandwidth sensor capture |
| USB 3.2 Gen 2 | (formerly USB 3.1) | 10 Gbit/s | 1 SuperSpeed pair + USB 2.0 pair | High-resolution video capture, fast external SSDs |
| USB 3.2 Gen 2x2 | — | 20 Gbit/s | 2 SuperSpeed pairs (USB-C only) + USB 2.0 pair | Rare in embedded; mostly PC peripheral and storage products |
| USB4 | — | 40 Gbit/s (80 Gbit/s in USB4 v2) | Multiple lanes, tunnels PCIe/DisplayPort | Not applicable to microcontroller-class embedded design |
USB Full Speed and High Speed (the two tiers relevant to almost all MCU-based products) use a single differential pair — D+ and D– — for both directions, half-duplex. Every higher tier adds dedicated SuperSpeed transmit/receive pairs on top of, not instead of, the original D+/D– pair, which is why USB 3.x devices remain backward-compatible with USB 2.0-only hosts.
Connector Evolution
Physical USB connectors evolved somewhat independently of the underlying speed standard, which is a frequent source of confusion:
- Type-A — the original rectangular host-side connector, not reversible, still common on hosts (PCs, chargers) but rarely used as the device-side connector on new embedded products.
- Type-B / Mini-B / Micro-B — legacy device-side connectors used through the USB 2.0 era; Micro-B was the near-universal embedded device connector for over a decade before USB-C displaced it.
- USB-C — the current standard device-side (and increasingly host-side) connector: reversible, supports USB PD, and is required for USB4 and USB 3.2 Gen 2x2. See USB-C PCB design for CC resistor, ESD, and differential pair layout specifics.
A new embedded design in most markets today should default to USB-C regardless of which USB data-rate standard (2.0 or 3.x) it implements — the connector and the speed tier are independent choices, and USB-C is now the practical default connector even for USB 2.0-only devices.
PHY Requirements by Speed Grade
USB Full Speed and High Speed PHYs are commonly integrated directly into microcontroller silicon (STM32F4/F7/H7, many ESP32 and nRF variants with USB support) — no external PHY IC is required for the majority of embedded designs. USB 3.x SuperSpeed PHYs are a fundamentally different hardware class: high-speed SerDes circuitry that is essentially never integrated into general-purpose microcontrollers. A product genuinely requiring USB 3.x throughput typically pairs a dedicated USB 3.x controller/PHY IC with an applications processor rather than an MCU, or uses a purpose-built USB 3.x peripheral bridge chip.
When Each Version Actually Matters for Embedded Design
- USB 2.0 Full Speed (12 Mbit/s): sufficient for CDC-ACM debug/configuration serial ports, HID (keyboards, custom controllers, bootloader interfaces), and low-rate sensor telemetry. This is the default for the large majority of embedded products with a USB port.
- USB 2.0 High Speed (480 Mbit/s): needed for DFU firmware updates transferring large images quickly, mass storage emulation, or moderate-bandwidth streaming (audio interfaces, mid-resolution camera capture). Requires an MCU with a High Speed-capable PHY (not all "USB 2.0" MCUs support High Speed — some are Full Speed only).
- USB 3.x SuperSpeed: relevant only for genuinely high-throughput applications — external storage products, high-resolution or high-frame-rate camera products, or bulk data offload from an onboard sensor array. This tier essentially never appears on a microcontroller-class embedded design; treat its presence as a signal that the platform architecture has moved to an applications processor.
- USB4: not a realistic target for microcontroller-based embedded design. It tunnels PCIe and DisplayPort traffic and targets PC-class host/peripheral links; the PHY, controller, and certification complexity are out of scope for the vast majority of embedded products.
Design Considerations
- Default to USB 2.0 Full Speed or High Speed unless a specific throughput requirement rules it out. Most embedded products never need SuperSpeed; choosing USB 3.x adds PHY cost, layout complexity (85–90 Ω differential SuperSpeed pairs, tighter length matching), and certification scope with no benefit if the actual data rate need is well under 480 Mbit/s.
- Confirm your MCU's USB peripheral actually supports the speed grade you're designing for — some MCU families support only Full Speed even though they're broadly described as having "USB 2.0" support; check the datasheet's USB peripheral section specifically, not just the headline USB version.
- Use USB-C as the default connector regardless of speed tier, since it is now the practical standard even for USB 2.0-only products, and future-proofs the mechanical design if a later product revision needs SuperSpeed. Zeus Design selects USB hardware and firmware architecture matched to the actual throughput a product needs, rather than defaulting to the newest standard.
- If SuperSpeed genuinely is required, plan for an applications processor or dedicated USB 3.x controller from the start — this is a platform architecture decision, not a peripheral configuration choice on a microcontroller.
Common Mistakes
- Specifying "USB 3.0" or "USB4" for a product that only needs CDC-ACM debug serial or basic HID. This adds unnecessary hardware cost and design complexity for a data rate requirement that USB 2.0 Full Speed already satisfies by a wide margin.
- Assuming every microcontroller with "USB 2.0" listed in its datasheet supports High Speed. Full Speed (12 Mbit/s) and High Speed (480 Mbit/s) are both "USB 2.0" but require different PHY capability — verify the specific speed grade the target MCU's USB peripheral actually implements.
- Confusing USB 3.2 Gen 1/Gen 2/Gen 2x2 marketing names with actual data rates. Specify the numeric data rate requirement (e.g. "5 Gbit/s minimum") in design documentation rather than the generation name, which has been renamed at least once and is a common source of miscommunication with fabricators and component vendors.
- Choosing a legacy Micro-B connector for a new design. USB-C is now the practical default; a new embedded product using Micro-B is both harder to source components for over the product's lifetime and behind current user expectations.
- Treating USB4 as a natural "next step up" from USB 3.x for an embedded product. USB4's complexity (PCIe/DisplayPort tunnelling, PC-class host requirements) makes it essentially inapplicable to microcontroller-based embedded design regardless of how much throughput headroom might seem attractive on paper.
Frequently Asked Questions
- Why does USB 3.2 have confusing 'Gen 1', 'Gen 2', 'Gen 2x2' naming?
- The USB-IF retroactively renamed earlier standards under the USB 3.2 umbrella for marketing consistency, which is widely regarded as one of the more confusing aspects of USB branding. What was originally called USB 3.0 (5 Gbit/s, single lane) became USB 3.2 Gen 1; USB 3.1 (10 Gbit/s, single lane) became USB 3.2 Gen 2; and USB 3.2 Gen 2x2 is the genuinely new addition — 20 Gbit/s using both SuperSpeed lane pairs simultaneously, which only USB-C connectors support (Type-A cannot carry the second lane pair). For embedded design purposes, ignore the marketing generation names and specify the actual data rate (5/10/20 Gbit/s) your design needs.
- Do I need a USB-C connector to get USB 3.x speeds?
- Not strictly — USB 3.x SuperSpeed signalling works over both USB-C and the legacy USB 3.0 Type-A/Micro-B connectors, provided the additional SuperSpeed differential pairs are wired. However, USB-C is the practical default for any new USB 3.x design: it's reversible, carries USB PD for power delivery, and is required for USB 3.2 Gen 2x2's 20 Gbit/s dual-lane mode and for USB4 entirely. New embedded designs needing SuperSpeed should use USB-C rather than legacy USB 3.0 connectors.
- What USB PHY does a typical microcontroller integrate?
- Most microcontrollers with built-in USB support integrate a USB 2.0 Full Speed (12 Mbit/s) or High Speed (480 Mbit/s) PHY directly on-die — no external PHY chip is needed for CDC-ACM, HID, or DFU applications. USB 3.x SuperSpeed PHYs are a different class of device entirely, requiring dedicated high-speed SerDes hardware that is essentially never integrated into general-purpose microcontrollers; a product needing USB 3.x typically uses a dedicated USB 3.x controller IC or an applications processor (not a microcontroller) with an integrated SuperSpeed PHY.
References
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