What Is EMC Immunity Testing?

Detailed Explanation

EMC has two halves. Emissions testing limits how much electromagnetic energy a product is allowed to put out — covered in conducted vs radiated emissions. Immunity testing is the other half: it confirms a product continues to function correctly, or fails safely and recoverably, when it's exposed to the electrical and electromagnetic disturbances it will actually encounter in the field — mains transients, electrostatic discharge from a person touching a connector, nearby RF transmitters, and switching noise from other equipment sharing the same supply.

Immunity failures are a common source of field returns and warranty claims precisely because they often don't show up in a quiet lab bench test. A product can pass every functional test on the bench and still lock up, reset, or corrupt data the first time someone touches a metal connector on a dry day, or the first time it's installed near a two-way radio.

This page covers the core IEC 61000-4 immunity test series, how severity levels and performance criteria work, and the PCB design and component-selection practices that determine whether a product passes on the first attempt. For the standards-selection decision framework covering which Australian standard (and paired immunity standard) applies to your product category, see which EMC standard applies to my product in Australia.

The IEC 61000-4 Test Series

The IEC 61000-4 series defines the standardised test methods referenced by nearly every product-specific and generic EMC standard, including CISPR 35 (multimedia immunity) and IEC 61000-6-2 (generic industrial immunity):

Each test method specifies the waveform (rise time, duration, source impedance), the coupling method used to apply it, and a table of severity levels the product-specific standard selects from.

Electrostatic Discharge (ESD) — IEC 61000-4-2

ESD testing simulates a charged person or object discharging into the product. Two discharge modes are tested:

• Contact discharge — the test gun's electrode touches a conductive surface directly, then discharges. This is the more repeatable and generally preferred method where a conductive surface is accessible.
• Air discharge — the charged electrode approaches a non-conductive surface (a plastic enclosure, a button) until it arcs across. Used where contact discharge isn't physically possible.

Typical test levels range from ±2 kV to ±8 kV contact discharge and up to ±15 kV air discharge for demanding product categories, though the applicable level depends on the product-specific standard. The rise time of the ESD event is extremely fast — under 1 nanosecond — which is why ESD-induced upsets are often a digital logic or firmware problem (a corrupted register, a glitched reset line) rather than a component-damage problem once basic protection is in place.

Radiated RF Immunity — IEC 61000-4-3

This test exposes the whole product to a continuous RF field, typically swept from 80 MHz to 6 GHz (the exact range depends on the applicable standard), at a field strength commonly between 3 V/m and 10 V/m. It simulates the product operating near a mobile phone, two-way radio, or other RF transmitter. Cables and PCB traces that aren't adequately filtered can act as unintentional receiving antennas, coupling the RF field into sensitive analog front ends (this is the same coupling mechanism, in reverse, that drives radiated emissions — see conducted vs radiated emissions).

Electrical Fast Transient/Burst — IEC 61000-4-4

EFT testing applies bursts of very fast, low-energy transients (rise time around 5 ns, burst repetition frequency of several kHz) to power and signal lines. It simulates the switching transients generated by relays, contactors, and motor brushes on a shared electrical supply — a common real-world disturbance in industrial and commercial environments. Because the individual transients are fast but low-energy, EFT immunity failures are typically logic-level glitches (unexpected resets, corrupted communication frames) rather than component damage.

Surge — IEC 61000-4-5

Surge testing applies a much higher-energy transient than EFT — simulating lightning-induced surges on outdoor or long cable runs, and switching surges from large inductive loads on the same supply. Test waveforms include the 1.2/50 µs open-circuit voltage waveform and 8/20 µs short-circuit current waveform, applied line-to-line and line-to-earth. Surge is the immunity test most likely to cause actual component damage rather than a transient logic upset, which is why surge protection devices (gas discharge tubes, MOVs, TVS diodes) are sized around energy absorption, not just clamping voltage.

Conducted RF Immunity — IEC 61000-4-6

Below roughly 80 MHz, it's more practical to inject an RF disturbance directly onto a cable than to radiate it (cables aren't yet efficient antennas at these frequencies — see the 30 MHz emissions boundary discussion in conducted vs radiated emissions for the related mechanism). IEC 61000-4-6 couples an RF signal, typically swept from 150 kHz to 80 MHz, onto power and signal cables via a coupling/decoupling network, simulating RF energy picked up by cables running near strong RF sources.

Performance Criteria: How Pass/Fail Is Judged

Immunity tests don't simply pass or fail — the product-specific standard defines which performance criterion applies to each test and severity level:

• Class A — the product operates within its specification during and after the test, with no observable degradation.
• Class B — the product may show temporary degradation or loss of function during the test, but self-recovers to normal operation without operator intervention once the disturbance is removed.
• Class C — the product may lose function during the test but requires operator intervention (manual reset, power cycle) to restore normal operation.
• Class D — the test causes permanent, unrecoverable damage or unsafe behaviour. This is a fail under essentially every standard.

Which class applies to which test is set by the applicable product standard, not chosen by the design team — a safety-relevant function (a motor drive's stop input, for example) typically must maintain Class A or B even where a display glitch elsewhere on the same product might be acceptable at Class B or C.

Design Considerations

• ESD protection starts at the connector, not the IC. TVS (transient voltage suppression) diodes placed as close as possible to the connector pin, with a short, low-inductance return path to chassis or protective earth, intercept the discharge before it reaches sensitive logic. Adding ESD protection only at the IC input, with several centimetres of trace between the connector and the protection device, gives the fast ESD edge time and impedance to couple into adjacent traces before it's clamped.
• A continuous ground/chassis reference matters as much for immunity as for emissions. The same solid ground plane, controlled return-path design, and short high-current loops that reduce radiated emissions (see how to reduce EMI in PCB design and PCB power and ground plane design) also give ESD and EFT transients a low-impedance path away from sensitive circuitry, rather than forcing them through signal ground.
• Surge protection is sized by energy, not just clamping voltage. A TVS diode selected only for its clamping voltage can still fail thermally under a surge event if its peak pulse power rating is undersized for the required surge waveform (1.2/50 µs / 8/20 µs) and energy level. For higher-energy surge requirements, a staged approach — a gas discharge tube or MOV for bulk energy absorption, followed by a faster TVS diode for clamping — is common on mains-connected and long-cable-run products.
• Firmware should treat brief resets as an expected event, not an anomaly. Because ESD and EFT immunity failures are frequently logic-level upsets rather than damage, firmware that gracefully recovers from an unexpected reset (preserving critical state in non-volatile memory, checking for a clean startup) turns a Class C or D outcome into an acceptable Class B result without any additional hardware protection.
• Test immunity early, informally, before the formal lab session. A handheld ESD gun used on a development board — discharging into connectors and the enclosure at a modest level — surfaces the worst offenders (an unprotected reset line, a floating shield) long before a costly formal test slot. For the broader pre-compliance testing workflow, see how to conduct EMC pre-compliance testing.
• Products intended for demanding environments — industrial, automotive, or anywhere immunity is a customer expectation rather than a strict regulatory minimum — benefit from immunity-aware layout from the schematic stage rather than retrofitting protection after a failed test. Zeus Design's engineering team designs ESD, EFT, and surge protection into the schematic and layout from the outset for products headed to formal EMC testing.

Common Mistakes

• Adding ESD/TVS protection as an afterthought at the IC pin instead of at the connector. The trace length between the connector and the protection device gives the fast ESD edge an opportunity to couple into neighbouring signals before it's clamped. Place protection as close to the point of entry as the connector footprint allows.
• Undersizing surge protection for the required energy level rather than just the clamping voltage. A component with the correct clamping voltage but an inadequate peak pulse power rating can survive a bench test but fail during the higher-energy surge waveform in a formal lab test, or in the field.
• Treating immunity as automatically covered by good emissions design. Emissions and immunity share some good practices (grounding, layout discipline) but are independent failure modes — a product with excellent emissions performance can still fail ESD testing if connector-level protection was never added.
• Firmware that hard-faults or hangs on an unexpected reset instead of recovering cleanly. Since many immunity failures manifest as a brief logic upset rather than damage, a firmware design that can't recover gracefully from a spurious reset turns a survivable disturbance into a Class C or D result.
• Skipping informal immunity checks before the formal test booking. A basic ESD gun check on a development board, even without a calibrated lab environment, surfaces layout weaknesses (unprotected connectors, poor grounding) far more cheaply than discovering them during a booked, paid formal test session.