Hiccup Mode vs Foldback Current Limiting: Which Should You Use for Overcurrent Protection?

Detailed Explanation

Every regulator, supervisor, or protection IC that limits output current has to answer the same question the moment it detects an overcurrent or short circuit condition: what happens next? This page is about that decision, the control strategy the IC follows once a fault has already been detected, not the sensing itself and not the choice of protection component. For how the current is sensed and where a passive protection element (PTC, fuse, eFuse) fits instead of or alongside an active regulator's own current limiting, see PTC vs fuse vs eFuse: how do you choose overcurrent protection?. For the related but distinct problem of controlling the first few milliseconds of power application before a supply is even in regulation, see how do you limit inrush current when a board is hot plugged or powered on?.

Two response strategies dominate modern regulator and controller ICs: foldback current limiting and hiccup mode. A third, simpler baseline, a flat (constant) current limit that just holds output current at a fixed maximum regardless of output voltage, is also common and worth understanding first, since both foldback and hiccup mode are refinements built on top of it.

What Triggers the Response

All three strategies start the same way: the IC continuously monitors output current, usually through a sense resistor, an inductor's DC resistance, or a switch's on resistance, and compares that signal against a reference threshold. When current tries to exceed the threshold, whether because of an overloaded output, a shorted downstream trace, or a failed component pulling more current than the design expects, the IC's control loop intervenes to hold current at or below the limit instead of letting it rise unchecked. What differs between the three strategies is what the IC does with that intervention over time, not how the fault is first detected.

A flat current limit simply clamps output current at its set point and holds output voltage at whatever value results from that current flowing into the load, for as long as the fault persists. Into a hard short (near zero ohms), this can mean the full current limit flows continuously into a near zero volt output. For a switching regulator, that is mostly a current stress problem for the switch and inductor. For a linear regulator, it is also a power dissipation problem: with output voltage near zero, nearly the full input voltage appears across the pass transistor while it carries the full current limit, which is often the single worst case power dissipation point the pass device sees across its entire operating range.

Foldback Current Limiting

Foldback current limiting addresses that linear regulator worst case directly: as output voltage drops below its regulated value, the current limit set point is reduced along with it, so the output current versus voltage characteristic bends, or folds back, toward the origin instead of staying flat. At a dead short, the current delivered is well below the normal current limit, which caps the power dissipated in the pass device or switch during the worst fault condition rather than letting it hit the flat limit's peak.

Foldback current limiting was originally developed for linear regulators, where the pass transistor's dissipation during a hard short is the dominant thermal concern, and TI's application note on the technique documents that history directly (see references below). It has since been applied to some switching regulator designs too, though implementing a stable, well behaved fold back characteristic in a switching converter's control loop adds real design complexity that a flat limit or hiccup mode does not require.

The practical problem with foldback current limiting is what happens at startup, or into a load whose current demand rises as voltage falls. Both situations sit on a collision course with a curve that is deliberately designed to reduce available current exactly when voltage is low. A fully discharged output capacitor at power up, a downstream constant voltage, constant power converter drawing more input current as its input voltage sags, and a motor whose starting current stays high while its back EMF (and therefore the supply voltage it presents) is still low, can all pin a foldback limited supply at a low output voltage indefinitely, unable to deliver enough current at that voltage to climb any further. This is often called a "won't start" failure, and it is the main reason foldback current limiting needs careful verification against the specific load the supply will actually see, not just against a resistive test load.

Hiccup Mode

Hiccup mode takes a different approach to the same underlying goal, limiting average power dissipation during a sustained fault, without shaping the current limit curve at all. When the IC detects a persistent overcurrent condition (typically after the flat or cycle by cycle current limit has been active for some minimum duration, not on the very first instant of overcurrent), it shuts the output down completely rather than continuing to regulate into the fault. After a fixed off time, it attempts a fresh soft start. If the fault is still present, the new soft start attempt trips the current limit again, the IC shuts down again, and the cycle repeats, giving the characteristic on-off "hiccup" pattern on an oscilloscope. Once the fault clears, the next retry attempt starts up normally and the supply returns to regulation.

Because the IC is fully off for most of the hiccup period, average power dissipation during a sustained fault is much lower than continuous operation at even a well designed flat or folded current limit, without needing the analog complexity of a fold back curve. It also avoids the foldback "won't start" problem entirely: every retry is a completely fresh soft start attempt from zero, so the supply keeps trying periodically regardless of what kind of load or fault it is trying to start into, rather than settling into a stuck low voltage state.

The trade off is behaviour during the fault itself: the output pulses on and off rather than holding steady at any voltage, which downstream circuits need to tolerate. A microcontroller or FPGA repeatedly seeing partial power up attempts on a rail, a data logger losing buffered data on every cycle, or an upstream sequencing or supervisor circuit reacting to a rail that keeps toggling, are all things worth checking during a fault, not just confirming that the fault itself is handled safely.

Choosing Between Them

For most modern point of load and system power designs, hiccup mode is the more common default, and for good reason: it works consistently across a wide range of load types without the load dependent failure mode that foldback carries, and it is simpler to implement reliably in a switching converter's control loop. Renesas's overview of buck regulator overcurrent protection describes cycle by cycle limiting and hiccup mode together as the standard combination in modern integrated parts, with foldback treated as a technique more associated with linear regulator designs and legacy switching parts (see references below).

Foldback current limiting is still the right choice in specific situations: simple linear regulators where minimising pass transistor dissipation during a hard short is the dominant design constraint, and designs where the downstream load is well characterised, resistive or close to it, and known never to exhibit the rising current at falling voltage behaviour that causes the startup problem. Outside those cases, particularly for any supply feeding a motor, a downstream switching converter operating in constant voltage mode, or a large bulk capacitance at power up, hiccup mode is the safer default because it cannot get stuck.

Design Considerations

• Verify which mode a candidate IC actually uses from its datasheet, not from the part's general category. "Current limiting" and "short circuit protection" are used loosely across datasheets to describe flat limiting, foldback, hiccup mode, or some combination, and the exact behaviour, including retry timing, whether hiccup mode is disable-able, and whether foldback is fixed or externally programmable, is only reliable from the specific device's electrical characteristics and functional description sections.
• Calculate worst case power dissipation from the actual fault response, not from a simplified assumption. For a flat or foldback limited supply, dissipation during a sustained fault is continuous and needs to be checked against the pass device or switch's steady state thermal rating. For hiccup mode, average dissipation during a fault is the on-period dissipation multiplied by the duty ratio of the hiccup cycle (on time versus total on plus off time), a figure the datasheet sometimes states directly and sometimes requires measuring or calculating from the stated off time and soft start duration. Either way, do not assume a fault is thermally benign just because the IC has some form of current limiting; carry the actual worst case number into the thermal budget as covered in thermal design and heatsink selection for power components.
• Test startup into the real downstream load, not a resistive bench load, before committing to a foldback limited part. A resistive load never exposes the rising current at falling voltage behaviour that causes foldback's startup failure, so a design can pass bench testing and still fail to start reliably once connected to its actual motor, constant power converter, or bulk capacitance in the field.
• Check what a hiccup cycle looks like to the rest of the system, not just to the faulted rail. A repeatedly toggling output can retrigger a downstream supervisor, reset a microcontroller mid boot, or interact badly with power sequencing on other rails; see how do you design power sequencing for a multi rail board? if the affected rail has sequencing dependencies with others on the board.

Zeus Design's electronics design team selects and verifies overcurrent protection strategy, including foldback versus hiccup mode behaviour, thermal worst case, and startup verification against the real downstream load, as part of complete power supply design. Get in touch with Zeus Design if your product's power stage needs its fault response designed and validated.

Common Mistakes

• Assuming a datasheet's "current limit" spec describes a flat, unconditional limit without checking the actual fault response. A part can carry a clean single current limit specification while its actual behaviour under sustained fault is hiccup mode, foldback, or a hybrid of the two; the specification alone does not tell you which. See this real world example of a buck converter entering hiccup mode under load for how easily hiccup mode's on-off pattern on a scope can be mistaken for a different root cause during bring up.
• Confusing constant current (CC) mode, common in battery chargers and LED drivers, with foldback current limiting. CC mode holds a fixed current regardless of voltage, by design, as the normal operating mode for that circuit. Foldback current limiting is a fault response that deliberately reduces current as voltage falls; the two behave very differently and are not interchangeable concepts despite both involving current regulation.
• Not verifying startup into the actual worst case load before choosing a foldback limited supply. As covered above, this failure mode often does not appear until integration testing with real hardware, well after the regulator has already been selected and the board laid out.
• Treating hiccup mode's retry behaviour as automatically safe for any downstream circuit without checking retry timing. A hiccup period that is too short for a downstream microcontroller to properly brown out and reset, rather than glitching partway through its own power up sequence, can leave that device in an undefined state instead of cleanly resetting on every retry.
• Overlooking that hiccup mode and an eFuse's auto-retry behaviour raise the same underlying question. Both repeatedly reapply power to a fault that has not actually been fixed. Whether that is acceptable, or whether the design instead needs a protection layer that latches off and requires a deliberate restart, is the same decision covered for eFuse ICs in PTC vs fuse vs eFuse overcurrent protection, just applied at the regulator's own control loop instead of a separate protection IC.