What Are Inverting and Non-Inverting Op-Amp Amplifier Configurations?

Detailed Explanation

The inverting and non-inverting amplifier configurations are the two fundamental closed-loop applications of an op-amp. Everything else — summing amplifiers, difference amplifiers, integrators, instrumentation amplifiers — is a variation or extension of these two topologies. Understanding how the virtual short principle generates the gain equations makes every other configuration intuitive.

Inverting Amplifier

Circuit: The input signal (Vin) connects to the inverting input (−) through a resistor Rin. A feedback resistor Rf connects from the op-amp output back to the inverting input (−). The non-inverting input (+) is connected to the reference voltage (ground for a dual-supply circuit, or Vcc/2 for single-supply).

Vin ─── Rin ─── (−)
                 op-amp ─── Vout
Vref ─────────── (+)
        Rf
Vout ───────────(−)

Deriving the gain: By the virtual short, V− = V+ = Vref. Since Rin connects Vin to a node at Vref, the current through Rin is:

I_in = (Vin − Vref) / Rin

This same current must flow through Rf (since no current enters the op-amp input), creating a voltage across Rf:

Vout − Vref = −I_in × Rf = −(Vin − Vref) × Rf/Rin

For Vref = 0V (dual-supply, or AC-coupled circuit):

Vout = −Vin × (Rf/Rin)
Gain = −Rf/Rin

Key properties:

• Gain magnitude = Rf/Rin; set by resistor ratio, not op-amp parameters.
• Output is phase-inverted (180° shift) relative to the input.
• Input impedance ≈ Rin (the current path for Vin is into Rin; V− is at virtual ground).
• Gain can be less than 1 (attenuation) if Rf < Rin.

Example: Gain of −10 Set Rin = 10 kΩ, Rf = 100 kΩ. A +1V input produces −10V output. Bandwidth = GBW ÷ 10.

Error resistor: To cancel the DC offset error from input bias current, place a resistor R_bal = Rf ∥ Rin at the non-inverting input to ground. This ensures both inputs see equal Thevenin source resistance.

Non-Inverting Amplifier

Circuit: The input signal (Vin) connects directly to the non-inverting input (+). A resistor Rin connects from the inverting input (−) to the reference (ground or Vcc/2), and Rf connects from the inverting input (−) back to the output.

Deriving the gain: By the virtual short, V− = V+ = Vin. V− is also a node in a voltage divider formed by Rin (to reference) and Rf (to Vout):

V− = Vout × Rin/(Rin + Rf)

Setting V− = Vin:

Vin = Vout × Rin/(Rin + Rf)
Vout/Vin = (Rin + Rf)/Rin = 1 + Rf/Rin
Gain = 1 + Rf/Rin

Key properties:

• Gain is always ≥ 1 (minimum is unity, when Rf = 0).
• Output is in phase with the input (no phase inversion).
• Input impedance is very high — determined by the op-amp's input impedance (typically MΩ to GΩ), not by resistors.
• This configuration is better when a high-impedance input is important (sensor interfaces, voltage references).

Example: Gain of +11 Set Rin = 1 kΩ, Rf = 10 kΩ. A +1V input produces +11V output. Bandwidth = GBW ÷ 11.

Summing Amplifier (Inverting)

The inverting configuration extends directly to a summing amplifier by adding additional input resistors. With inputs V1, V2, V3 through R1, R2, R3 to the virtual ground node, and feedback Rf:

Vout = −Rf × (V1/R1 + V2/R2 + V3/R3)

If all input resistors are equal (R1 = R2 = R3 = R):

Vout = −(Rf/R) × (V1 + V2 + V3)

This is an analog summing circuit — the foundation of DAC networks and audio mixer circuits. The inverting configuration is also the basis of the Multiple Feedback (MFB) active filter topology; see active filter design with op-amps for how MFB and Sallen-Key filters compare.

Choosing Between Configurations

Use the inverting configuration when:

• The input impedance is driven by a low-impedance source (op-amp output, DAC output)
• Attenuation (gain < 1) is needed
• A summing amplifier is required
• Phase inversion is acceptable or needed

Use the non-inverting configuration when:

• High input impedance is required (sensor outputs, voltage references, ADC-driving)
• Phase must not be inverted
• Gain ≥ 1 is sufficient

Gain-Bandwidth Limit

For a single-pole op-amp, bandwidth × closed-loop gain = GBW (a constant). At gain 100 with a 1 MHz GBW device, the −3 dB bandwidth is 10 kHz. At gain 10 it is 100 kHz. This constrains how much gain can be achieved in a single stage at a given frequency. For high-gain, wide-bandwidth circuits, cascade two or more stages rather than using a single high-gain stage.

For analog circuit design assistance — from gain and bandwidth calculation through PCB layout and prototype validation — Zeus Design's electronics engineering team covers the full stack — contact Zeus Design.

Design Considerations

• Keep resistor values in the range 1 kΩ–100 kΩ for general-purpose BJT op-amps. Below 1 kΩ, output current requirements become significant (the op-amp must source/sink the feedback current continuously). Above 100 kΩ, input bias current errors and thermal noise grow.
• CMRR of the non-inverting configuration degrades with mismatched resistors. If you use the non-inverting amplifier as part of a difference amplifier and want high CMRR, match all four resistors to 0.1% tolerance. Mismatched resistors degrade CMRR significantly.
• For accurate DC gain, choose op-amps with low Vos and Ib. Gain accuracy is limited by the op-amp's input offset voltage multiplied by the closed-loop gain. An op-amp with 5 mV Vos at gain 100 produces a 500 mV DC error at the output. Precision op-amps with Vos under 100 µV are needed for accurate DC amplification at high gain.

Common Mistakes

• Omitting the bias balance resistor in the inverting configuration. The non-inverting input should see a resistance equal to Rf ∥ Rin for DC bias current cancellation. Without it, input bias current through Rf creates a DC output offset equal to Ib × Rf — which can easily be tens of millivolts for a BJT op-amp with 100 nA bias current and a 100 kΩ feedback resistor.
• Setting Rf to zero in an inverting amplifier for unity gain. An inverting amplifier with Rf = 0 and Rin = any value gives gain 0 — the output is shorted to the inverting input at DC, collapsing the virtual ground. Use a unity-gain inverting amplifier with Rf = Rin, not Rf = 0.
• Exceeding the gain-bandwidth limit. Designing a single stage at gain 1,000 with a 1 MHz GBW op-amp yields 1 kHz bandwidth — probably too narrow for the intended application. Check the GBW budget before specifying the gain; cascade stages if needed.
• Driving capacitive loads directly from the output. A long cable or capacitive ADC input can cause the amplifier to ring or oscillate. Add a 47–100 Ω series resistor at the output between the op-amp and the load to prevent instability.