How Do You Bias an Op-Amp for Single-Supply Operation (Mid-Supply Reference)?

Detailed Explanation

Most op-amp circuits are first taught on a dual (split) supply, where ground sits comfortably in the middle of the output range and a signal that swings above and below 0V is never a problem. Move that same circuit onto a single 3.3V or 5V rail, which is the reality for almost every embedded and battery-powered board, and the op-amp's output can no longer go below ground at all. Any AC signal referenced to 0V immediately clips on its negative half-cycle. The fix is to bias the circuit around a reference voltage roughly in the middle of the supply, usually called mid-supply or a virtual ground, so the signal has room to swing both up and down from that point without ever asking the output to go negative. See what is an op-amp? for the underlying single-supply headroom and common-mode range constraints this reference is working around, and inverting and non-inverting op-amp configurations for how that same reference point substitutes for ground at the non-inverting input in both topologies.

This page covers the practical side of that one design decision: how to actually build and buffer the mid-supply reference itself, not just where it plugs into the gain stage. See the Op-Amps topic for the full set of op-amp circuit design guides.

Why the Reference Node Needs to Be a Real, Low-Impedance Source

It's tempting to treat the mid-supply reference as a fixed voltage and stop thinking about it, but in a real circuit it's a physical node with its own source impedance. Everything connected to it, the op-amp's own bias input, any AC-coupling network on the signal path, whatever noise happens to couple in nearby, either draws current from it or dumps noise onto it. A reference with high source impedance moves under load and picks up noise easily; a "stiff," low-impedance reference stays put. Because the reference sets the DC operating point that the following gain stage amplifies along with the signal, any noise or drift on that node is amplified right along with the wanted signal. This is the core design problem the rest of this page addresses: getting the reference node's own impedance low enough, and its noise low enough, that it behaves like the ideal fixed voltage it's meant to represent.

Divider + Buffer: The Standard Approach

The most common way to build a mid-supply reference is a two-resistor divider from the supply to ground, followed by a unity-gain op-amp buffer (voltage follower) so the reference presents a low output impedance to whatever it feeds.

Vcc ──── R1 ──┬──── (+) OA ──── Vref (buffered, low-Z)
              │      (−)
              R2      └──── (feedback, direct to output)
              │
             GND

With R1 = R2, the divider midpoint sits at Vcc/2. The divider's own Thevenin output impedance is R1 ∥ R2: for two equal 10 kΩ resistors, that's 5 kΩ, far too high to drive a load directly without the reference sagging. The buffer's job is to isolate that high-impedance divider from whatever needs the reference, presenting a very low output impedance at its own output instead.

The buffer earns its place here. Without it, any current drawn from the divider node (bias current into a following op-amp's input, leakage through an AC-coupling network, or a second stage sharing the same reference) creates a voltage drop across R1 ∥ R2 and moves the reference point away from its intended value. A buffered reference holds steady because the op-amp's feedback actively corrects for whatever current the load pulls, within the buffer's own output current limit.

Sizing the divider resistors: there's no single correct value; it's a trade-off, not a fixed rule. Lower resistor values (a few kΩ) draw more quiescent current from the supply but are less sensitive to the buffer's own input bias current and less prone to picking up noise capacitively. Higher values (tens of kΩ) save supply current but make the node more susceptible to bias-current offset and noise pickup. Common practice keeps both resistors equal (for a Vcc/2 midpoint) and in the low-to-mid kΩ range for general-purpose CMOS op-amp buffers, adjusted up or down based on the supply-current budget and noise environment of the specific design. See what is a voltage divider? for the loading-effect math this trade-off is built on.

Rail-Splitter Reference ICs: A Dedicated Alternative

Instead of building the divider-plus-buffer circuit from discrete parts, a dedicated rail-splitter IC does the same job in a single package. The TLE2426, marketed by Texas Instruments as a "Rail Splitter" precision virtual ground, is the best-known part in this category: internally it's a precision divider and a low-output-impedance buffer combined, intended to be dropped straight in as a mid-supply reference.

The practical trade-offs versus a discrete divider + buffer:

• Output impedance: a purpose-built rail-splitter IC is specified and optimised for very low output impedance held flat over a wider frequency range than a generic op-amp buffer typically manages without extra design effort. Check the specific part's datasheet for the actual figure and how it varies with frequency. Treat any number quoted for a rail splitter as typical, not universal, since it depends on the part and its bias conditions.
• Current sourcing and sinking: rail splitters are generally specified for a defined, often fairly limited, current window in both directions (sourcing and sinking), since the whole point is to hold the midpoint steady regardless of which way current flows through it. Verify the specific part's current rating against the actual load the reference has to drive; exceeding it degrades output impedance or regulation just like overloading a linear regulator.
• Cost and board space: a dedicated IC costs more than two resistors and a spare op-amp channel, but it's a single, well-characterised part rather than a discrete circuit that needs its own design and verification. If the design already has a spare op-amp channel free (common in dual and quad packages), the discrete approach is often the cheaper option; if not, or if the discrete circuit's performance isn't good enough, a rail-splitter IC is a small, known-good building block.
• Multiple reference points: if more than one stage on the board needs the same mid-supply reference, a single rail-splitter IC (or a single buffered divider) can usually feed all of them, provided the combined load current stays within the part's rated output current and each downstream stage's own decoupling is adequate.

AC-Coupling the Input to the Bias Point

The mid-supply reference is almost always paired with AC-coupling the input signal, rather than DC-coupling it directly, because most single-supply signal sources are referenced to 0V and would otherwise force the amplifier's input away from the bias point entirely.

Vin (AC, 0V-referenced) ──── C_couple ──┬──── (+) OA input
                                        │
                                        R_bias
                                        │
                                       Vref (mid-supply)

The coupling capacitor blocks the DC component of the input signal (which may be 0V, or may carry an unwanted DC offset from the source) while passing the AC component through to the op-amp's input. The bias resistor R_bias then sets the op-amp input's DC level to the mid-supply reference in the absence of an AC signal. Together, C_couple and R_bias form a high-pass filter with cutoff frequency:

fc = 1 / (2π × R_bias × C_couple)

The cutoff needs to sit well below the lowest frequency of interest in the signal, or the coupling network itself will attenuate the signal it's supposed to pass through unchanged. For an audio-frequency signal that needs to pass frequencies down to 20 Hz, for example, R_bias = 100 kΩ and C_couple = 100 nF gives fc ≈ 16 Hz, with margin below the 20 Hz target. The specific R_bias and C_couple values depend entirely on the lowest frequency the design needs to preserve; there's no fixed pair of values that suits every application.

Bypass Capacitor Sizing on the Bias Node

Because the mid-supply reference sets the DC operating point for everything downstream of it, any noise present on that node is amplified along with the signal, exactly the same way supply noise on an ADC's reference pin becomes measurement error. Bypassing the reference node with capacitance to ground, in addition to buffering it with low output impedance, is standard practice to keep high-frequency noise off it.

There's no single universal bypass value that fits every design; the right size depends on the reference's own source impedance, the noise the design needs to reject, and the frequency range of concern. As a general design approach rather than a fixed number, choose the bypass capacitance so that its impedance at the lowest frequency of noise you need to reject is small compared to whatever source impedance is feeding the node, and place it as close as physically possible to the reference pin or node it protects. Many single-supply designs pair a small ceramic capacitor (commonly in the range of tens to a few hundred nF) close to the reference pin with a larger bulk capacitor (commonly a few µF to tens of µF) nearby, the usual small-value-close, large-value-nearby split used for op-amp supply decoupling. Treat these as a starting point to verify against the actual noise environment and required bandwidth, not as a fixed rule. A rail-splitter IC's datasheet will usually specify a recommended bypass or output capacitor value for that specific part; follow it rather than defaulting to a generic figure, since the part's internal feedback loop is often designed and stability-tested around a particular capacitive load range.

Noise and Stability Considerations

A few practical points that go beyond simple bypassing:

• A high-impedance, unbypassed reference is a noise antenna. Any switching regulator ripple, digital clock coupling, or general board noise near the reference trace couples onto it capacitively or inductively and then rides straight through the gain stage as if it were part of the signal. Route the reference trace away from switching nodes and digital signal lines where practical, just as you would for any sensitive analog signal.
• Some rail-splitter ICs are only stable with a specific range of output capacitance, similar to how some linear regulators need a minimum ESR or capacitance at their output to remain stable. Check the datasheet's recommended capacitor range before choosing a bypass value freely; too little or, in some parts, too much capacitance outside the specified range can degrade transient response or introduce oscillation.
• A buffer op-amp driving the reference needs adequate output current headroom, not just DC accuracy. If several downstream stages share one buffered reference, add up their combined bias currents and any AC-coupling network's dynamic current draw, and confirm the buffer's output current rating comfortably exceeds that total. It's the same check you'd run for any op-amp driving a real load.
• Grounding matters as much as the reference itself. If the "ground" the reference is measured against isn't the same low-impedance ground the rest of the analog signal chain uses, ground-related noise shows up as reference noise even with a perfectly buffered, well-bypassed divider. Keep the reference's ground return and the signal chain's ground return on the same low-impedance analog ground.

Choosing Between Divider + Buffer and a Rail-Splitter IC

Neither option is universally "better." It's a design trade-off based on what's already on the board, the precision and noise budget of the specific application, and whether a spare op-amp channel happens to be free. A low-precision, single-stage sensor front end with a spare op-amp channel usually doesn't need a dedicated rail-splitter IC; a multi-stage audio or instrumentation signal chain sharing one reference across several ICs is a more typical case where the tighter, purpose-built specification of a rail-splitter IC earns its cost. For the broader signal-conditioning chain this reference typically sits inside, see sensor signal conditioning basics.

For product designs where the mid-supply reference has to hold steady across temperature, load, and a noisy board environment, Zeus Design's engineering team designs and validates single-supply analog front ends as part of complete electronics product design.

Design Considerations

• Match the buffer op-amp to the reference's actual load. A general-purpose CMOS op-amp buffer is adequate for a lightly loaded reference feeding one or two high-impedance inputs; a reference feeding several stages, or a low-impedance load, needs a buffer op-amp chosen (or a rail-splitter IC rated) for enough output current at the required output impedance.
• Decide the bias point based on required swing, not habit. Vcc/2 is the default because it centres the available output swing, but a design that only ever swings one direction from the reference can bias off-centre and use the extra headroom elsewhere. Confirm the chosen bias point plus expected signal swing stays inside the op-amp's output voltage swing specification at the real load current: see what is an op-amp? for why rail-to-rail headroom shrinks under load.
• Treat the AC-coupling network's cutoff frequency as a real design constraint, not an afterthought. Set R_bias and C_couple based on the lowest frequency the signal chain genuinely needs to pass, then verify the resulting cutoff with the actual component values chosen (standard resistor and capacitor series rarely land exactly on a calculated value).

Common Mistakes

• Driving the op-amp's bias input directly from an unbuffered divider. This works in a bench test with no load and fails once the circuit sees real bias current, a second stage sharing the reference, or any dynamic load: the reference sags and the DC operating point drifts. Buffer the divider, or use a rail-splitter IC, any time the reference feeds more than a negligible, constant load.
• Undersizing the bypass capacitance on the reference node and only discovering it as noise in the amplified output. Because the reference sets the amplifier's DC operating point, noise on that node is amplified along with the signal; it often shows up as a mysterious noise floor that looks like it belongs to the signal path itself, when the real cause is an inadequately bypassed reference.
• Forgetting the AC-coupling capacitor on the input and biasing the source directly instead. If the signal source itself is referenced to 0V (many sensors and line-level signals are) and gets tied straight to a mid-supply-biased op-amp input with no blocking capacitor, the DC bias point collapses toward the source's own reference instead of sitting at the intended mid-supply point.
• Assuming a rail-splitter IC's output can drive any load without checking its rated current. These parts are specified for a defined current window; exceeding it under real load conditions degrades the very low output impedance that's the whole reason to use the part in the first place.
• Letting the reference and signal-chain grounds diverge on the PCB. A well-designed, well-bypassed reference measured against the wrong ground still picks up noise; route the reference's ground return through the same low-impedance analog ground plane the rest of the signal chain uses.