How Is a PCB Assembly Tested and Inspected?

Detailed Explanation

A PCB that has passed reflow soldering and AOI is visually correct — but visual correctness and functional correctness are not the same thing. A hidden open joint under a BGA, a component with the correct physical appearance but the wrong value, or a short circuit between two power rails that happen not to be visible from above — none of these are caught by AOI.

The inspection and test sequence after SMT assembly exists to catch the gaps. Different methods catch different failure types; choosing the right combination depends on production volume, acceptable defect escape rate, board complexity, and budget.

Automated Optical Inspection (AOI)

AOI is a camera-based inspection system that photographs every component and solder joint on the assembled board after reflow. Most AOI systems use multiple camera angles and different lighting modes (top-down, angled, coaxial) to create 3D-like information from 2D images.

What AOI catches:

• Missing components (pad has solder but no component)
• Wrong component (incorrect marking on passive, wrong polarity for polarised component)
• Incorrect placement or rotation
• Solder bridges between adjacent pins
• Lifted leads on IC packages (if visible from above)
• Tombstoned passives
• Major solder volume deficiencies (visually obvious cold joints)

What AOI misses:

• Hidden solder joints: BGA balls, QFN pads on the bottom of the package, LGA contacts
• Marginal joints that look correct but have insufficient intermetallic bonding
• Component value errors on unmarked passives (ceramic capacitors have no visible marking — a 10 nF 0402 and a 1 µF 0402 look identical to AOI)
• Any functional failure (AOI does not apply power)

AOI is the minimum acceptable inspection for any SMT assembly. It typically adds 15–30 seconds per board at volume and is priced as a small per-board fee by most contract manufacturers.

X-Ray Inspection

X-ray sees through the board to image hidden solder joints. BGA balls, LGA pads, and QFN/DFN thermal pads are all visible under X-ray.

What X-ray detects:

• Solder ball opens or voids in BGAs
• Voids in QFN thermal pads (which affect thermal resistance)
• Misaligned BGA balls
• Solder short circuits inside component packages (less common but possible)

Limitations: X-ray is typically a sampling method rather than 100% inspection — it is too slow (several minutes per board for detailed imaging) and expensive to apply to every board in a production run. For BGAs and other area-array packages, X-ray inspection on first-article samples, on a failure-triggered basis, or at a defined sampling rate (e.g. 1 in 10 boards) is standard practice.

In-Circuit Test (ICT)

ICT uses a "bed-of-nails" fixture — a fixture containing many spring-loaded pins (probes) that contact test points on the PCB simultaneously when the board is pressed down onto the fixture. The ICT machine applies voltages and measures current, resistance, capacitance, and other parameters at each test point to verify that:

• Each component is present (measured resistance or capacitance matches the expected value)
• No shorts exist between nets that should be isolated
• Basic connectivity is correct (each component is connected to the nets the design says it should be on)

Advantages: Very fast (10–60 seconds per board); high fault coverage for assembly defects; does not require working firmware.

Disadvantages: Requires a custom fixture for each PCB design — fixture cost is typically AUD $5,000–20,000. Economical only for production volumes where the fixture cost amortises across enough boards (typically 500+ boards). Requires adequate test point coverage designed into the PCB (see FAQ). Cannot verify functional performance.

Flying Probe Test

Flying probe replaces the bed-of-nails fixture with two (or more) motorised probe arms that move to each test point in sequence and make electrical measurements. No fixture is needed — the probe positions are programmed from the netlist.

Advantages: No fixture cost — the same machine can test any board design. Can probe many nets, including some that ICT might miss due to fixture clearance constraints.

Disadvantages: Slow — 5–30 minutes per board (versus seconds for ICT), because the probes must physically move to each test point. Economical only for low volumes (prototypes, small batches, boards with complex geometries that make ICT fixtures expensive).

Typical use case: Prototype runs and small batches (under ~200–500 boards per year), or as an ICT complement for nets that the fixture cannot reach.

Functional Test

Functional test applies power to the assembled PCB and exercises it: the board is run through representative operating modes, programmed if it requires firmware, and its outputs are measured or observed.

What functional test catches:

• Any fault that ICT misses: wrong value on an unmarked component, marginal solder joint that passes DC continuity but fails under current, firmware startup problems, and any design defect that makes the board fail to perform its function
• All functional failures: output voltage accuracy, communications protocol correctness, interrupt response, sensor interfacing

What functional test cannot replace: AOI and ICT — functional test is the most expensive per-board test and catches faults later in the process. Allowing defective boards to reach functional test (rather than catching them earlier with AOI and ICT) is more expensive overall.

Fixture design: Functional test usually requires a custom test fixture: a pogo-pin board or "bed of nails" that connects to the PCB's test points, I/O connectors, or programming header, plus test software that automates the test sequence and records pass/fail results. Designing for testability — including a programming header, accessible test points for power and signal monitoring, and a UART debug port — at the PCB design stage significantly reduces functional test fixture cost and complexity.

Choosing the Right Test Strategy

The IPC-A-610 standard defines acceptability criteria for solder joint workmanship across all these inspection stages and provides the reference standard most contract manufacturers use for quality decisions.

Design Considerations

• Design for testability (DFT) early: Test point placement, programming headers, UART debug ports, and power monitoring hooks all reduce functional test cost and fixture complexity. Revisiting testability late in the design process is expensive — consider it at the same time as component placement.
• BGA and QFN components require X-ray: If the design includes area-array packages, budget for and specify X-ray inspection on first articles and at a defined sampling rate in production. Don't assume AOI covers these components.
• ICT fixturing is a lead-time item: ICT fixtures take 2–8 weeks to fabricate. If ICT is part of the production test strategy, start fixture design and procurement in parallel with PCB layout, not after first article.

Common Mistakes

• Specifying AOI as the only test method for a board with BGAs, then shipping units where hidden BGA opens escape to field.
• Placing no test points on power rails and critical nets, then discovering the functional test fixture cannot measure the signals it needs to verify.
• Assuming functional test alone is sufficient for volume production — functional test at 100% of boards is expensive and slow; AOI + ICT upstream reduces the number of boards that reach functional test with assembly defects, reducing cost per passing unit.
• Designing an ICT test point pad as a plated via rather than a dedicated accessible SMT test point, making it difficult for probe pins to make reliable contact.