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What Is a DAC (Digital-to-Analog Converter) and How Does It Work?

Last updated 27 June 2026 · 8 min read

Direct Answer

A digital-to-analog converter (DAC) converts an n-bit binary number into a proportional analog voltage or current. Resolution is set by bit depth: an n-bit DAC produces 2ⁿ distinct output levels over the full-scale range. A 12-bit DAC over a 3.3 V reference has an LSB (least significant bit) size of 3.3 V ÷ 4096 ≈ 0.8 mV. Common architectures include the R-2R resistor ladder (simple, one-resistor-per-bit design), string DAC, current-steering DAC (high speed), and sigma-delta DAC (very high resolution, lower bandwidth). Microcontrollers including the STM32 and nRF series include onboard DACs (typically 8–12 bit) suited to waveform generation, audio output, and analog bias or threshold generation.

Detailed Explanation

A DAC is the counterpart to the ADC: where an ADC reads the analog world and produces digital numbers, a DAC receives digital numbers and produces analog voltages (or currents) that can drive real-world outputs — speakers, servo controllers, optical modulators, reference voltages for analog circuits, and more.

Resolution and Dynamic Range

Resolution (bit depth) determines how finely the output voltage can be controlled. An n-bit DAC divides its full-scale output range into 2ⁿ steps, each of size:

LSB = Vref / 2ⁿ

Bit depthOutput levelsLSB (3.3 V reference)
8-bit25612.9 mV
10-bit1,0243.2 mV
12-bit4,0960.8 mV
16-bit65,53650 µV

Dynamic range is the ratio between the maximum output and the minimum resolvable step, expressed in dB. An n-bit DAC has a theoretical dynamic range of 6.02n + 1.76 dB: a 12-bit DAC achieves ~74 dB, a 16-bit DAC ~98 dB.

Spurious-free dynamic range (SFDR) is relevant for AC signal output (waveform generation): it measures the level of the strongest spurious frequency relative to the fundamental. High-speed DACs used in RF signal generation specify SFDR rather than just bit resolution, because nonlinearity at high frequencies generates harmonics and intermodulation products.

DAC Architectures

R-2R Resistor Ladder DAC: The classic low-cost architecture. A network of resistors with just two values (R and 2R) connects each bit of the digital input word to the output, weighted by its significance. The output current at each node is binary-weighted, so the sum produces an output proportional to the digital code. R-2R DACs are easy to build from discrete resistors and are used in educational examples and low-cost 8-bit outputs. The main limitation is that all resistors must match to better than 1/2ⁿ — so a 12-bit R-2R DAC requires resistor matching better than 0.024%.

String (Kelvin divider) DAC: A series chain of 2ⁿ equal resistors from Vref to ground, tapped by a multiplexer at the position corresponding to the digital code. Simple and inherently monotonic (the output always increases with increasing code), but requires 2ⁿ resistors — impractical beyond 8–10 bits.

Current-steering DAC: An array of matched current sources are switched on or off according to the digital code. The total current flows into a transimpedance amplifier (or a resistor) to convert current to voltage. This architecture achieves very high speed (GHz update rates in RF DACs) but requires careful layout to match the current sources.

Sigma-delta DAC: Uses a 1-bit (or few-bit) DAC operating at a very high frequency, with a digital noise-shaper that pushes quantisation noise to high frequencies, followed by an analog low-pass filter. The result is very high resolution (16–32 bits) at audio and measurement frequencies. This is the dominant architecture in audio and measurement DACs.

MCU Onboard DACs

Many mid-range and high-end microcontrollers include one or two onboard DAC channels:

STM32: Most STM32F4, F7, H7, and L series include 12-bit DACs. Output is driven from an internal buffer (enabling direct load driving) or in high-impedance mode (requiring an external op-amp buffer). The DAC can be triggered by timers for waveform generation without CPU intervention, using DMA to stream samples from memory. The STM32 DAC's output range is 0 to Vref (typically 3.3 V). See the STM32 peripheral configuration guide for DAC initialisation with CubeMX.

nRF52 series: Nordic's nRF52840 includes a 12-bit DAC. The nRF52832 does not have a DAC — use PWM + RC filter for analog output on that platform.

RP2040 (Raspberry Pi Pico): No onboard DAC — use filtered PWM or an external SPI/I2C DAC such as the MCP4725 (12-bit, I2C) or MCP4921 (12-bit, SPI).

ESP32: The original ESP32 has two 8-bit DACs. The ESP32-S2 and later variants may differ — check the specific datasheet.

External DAC ICs

For higher resolution, additional channels, or independent control from the MCU, external DAC ICs connect via SPI or I2C:

PartInterfaceResolutionNotes
MCP4725I2C12-bitSingle channel, integrated EEPROM, 2.7–5.5 V
MCP4921SPI12-bitSingle channel, fast SPI up to 20 MHz
DAC8552SPI16-bitDual channel, 2.7–5.5 V, unbuffered output
AD5668SPI16-bitOctal channel, precision reference options
MCP4922SPI12-bitDual channel, simultaneous update latch

The SPI and I2C DACs above are suited for control voltages, precision analog output, and arbitrary waveform generation. For dedicated audio output — streaming PCM samples to a speaker amplifier or headphone driver — the interface is typically I2S: audio DACs such as the PCM5102A and MAX98357A accept I2S input directly rather than SPI, and are common choices in embedded audio designs.

Output Buffering

Most DACs have a current-mode or high-impedance voltage output. Driving any significant load (below ~10 kΩ) without an output buffer will load the DAC and shift the output voltage from its ideal value. An op-amp configured as a unity-gain buffer (voltage follower) isolates the DAC output from the load. Choose a rail-to-rail output op-amp for single-supply designs where the DAC output may swing near 0 V or Vref.

If the DAC output drives an inductive load (solenoid, speaker coil), the buffer op-amp must be capable of the required output current — most general-purpose op-amps source only 10–40 mA. Use a dedicated audio amplifier IC or add a transistor output stage for higher current.

Waveform Generation

Generating a continuous waveform (sine, triangle, arbitrary) at a defined frequency requires:

  1. A lookup table stored in memory (e.g. one period of a sine wave as 256 12-bit samples)
  2. A timer interrupt or DMA controller that outputs one sample to the DAC at each sample interval
  3. The DAC and output filter to convert the staircase output to a smooth waveform

Sample rate must be at least 2× the desired output frequency (Nyquist criterion). A low-pass output filter removes the staircase steps and the sampling-frequency images from the DAC output, producing the desired waveform.

For a complementary view of the ADC side (sampling analog signals), see what is an ADC?. The what is an op-amp? article covers voltage buffer circuits used in DAC output stages.

For MCU-based signal generation, control voltage outputs, and analog output circuit design as part of a complete hardware product, Zeus Design's engineering team provides full product development support.

Design Considerations

  • Reference voltage quality determines output accuracy: The DAC output is ratiometric to its reference — if the reference voltage drifts, the output drifts with it. For precision applications, power the DAC from a dedicated voltage reference IC (e.g. REF3033 for 3.3 V), not from the MCU's AVCC pin which carries switching regulator noise.
  • Output settling time matters for step-change outputs: DAC settling time is the time for the output to settle to within ±0.5 LSB after a full-scale code change. For audio at 48 kSPS, the DAC must settle in under 20 µs — most modern DACs settle in 1–5 µs, well within this. For high-speed signal generation, settling time becomes a design constraint.
  • Glitch energy (glitch impulse): When the DAC code changes, particularly across major carry boundaries (e.g. 0111...1 → 1000...0), internal switching transients can produce a brief output glitch larger than one LSB. High-quality DACs specify glitch energy in nV·s. For sensitive applications, add a slow output filter that attenuates the glitch without affecting signal bandwidth.
  • Digital noise coupling: The DAC's AVCC and AGND pins must be decoupled from digital supply noise. Place a ferrite bead and 100 nF + 10 µF capacitors on the analog supply to the DAC. Route the DAC and its reference away from high-speed digital signals on the PCB.

Common Mistakes

  • Forgetting the output buffer: A high-impedance DAC output driving a resistive load shifts the output voltage below the expected value. Always check the DAC's output impedance (typically 1–10 kΩ for unbuffered, <1 Ω for buffered) and either choose a buffered DAC or add an op-amp follower.
  • Setting DMA transfer size incorrectly: When using DMA to stream waveform samples to the DAC, the DMA configuration must match the DAC register width. Writing 16-bit samples to a 12-bit DAC register misaligned (left-justified vs right-justified) shifts the effective bit positions and produces a distorted, lower-amplitude output. Check the MCU's data sheet for the required data alignment.
  • Ignoring the power supply filtering for the DAC reference: Sharing the MCU's 3.3 V rail for the DAC reference without LC or RC filtering introduces switching regulator noise directly into the DAC output, limiting effective resolution at low signal levels. At 12 bits, any reference noise above ~1 mV limits effective resolution.

Frequently Asked Questions

What is the difference between a DAC and an ADC?
An ADC (analog-to-digital converter) samples a real-world analog voltage and converts it to a digital number — it is an input device that reads the physical world. A DAC converts in the opposite direction: it takes a digital number from a microcontroller or DSP and produces a corresponding analog voltage or current — it is an output device that drives the physical world. Many MCUs include both: an ADC for reading sensors and a DAC for generating audio, control voltages, or reference levels.
What DAC resolution do I need?
Start from the required output voltage accuracy. A 12-bit DAC over a 3.3 V range resolves 0.8 mV per step. An 8-bit DAC over the same range resolves 12.9 mV per step — coarse enough to see discrete steps in an audio waveform. For audio output: 12-bit minimum for acceptable quality, 16-bit for near-CD quality. For control voltages (setting a threshold or trim level): 8–10 bits is often sufficient. For precision test equipment output: 16–24 bit DACs are standard. Also consider non-linearity (DNL and INL): a 12-bit DAC with 1 LSB INL is effectively accurate to 12 bits; with 4 LSB INL it is effectively accurate to about 10 bits.
Can a PWM output substitute for a DAC?
Yes, with limitations. A microcontroller PWM output followed by a low-pass RC filter produces a DC voltage proportional to the PWM duty cycle — effectively a 1-bit DAC with the filter averaging the pulses. Resolution depends on the PWM timer counter depth (an 8-bit counter gives 256 levels, a 16-bit counter gives 65,536 levels) and the switching frequency. The main limitation is settling time: changing the output voltage requires the filter capacitor to charge or discharge through the filter resistor — it cannot change fast. For slowly changing setpoints (bias voltages, LED dimming), filtered PWM is entirely practical and saves the cost of a dedicated DAC. For waveform generation (audio, arbitrary waveform output), a real DAC is needed.

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