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How to Design a Reflow Profile for PCB Assembly

Last updated 29 June 2026 · 11 min read

Direct Answer

A reflow profile has four zones: preheat (ramp from ambient to ~150°C at 1–3°C/s), soak (150–200°C held for 60–120 s to activate flux and equalise thermal mass), reflow (above the alloy's liquidus — 217°C for SAC305 — peaking at 235–250°C for 30–90 s time above liquidus), and controlled cooling (≤4–6°C/s). The solder paste manufacturer's datasheet is the primary reference for zone parameters. J-STD-020 sets the component-rated maximum peak temperature and TAL. Validate the actual board profile with a thermocouple profiler before committing to production.

Detailed Explanation

The reflow profile is the time-temperature program that controls how a populated PCB passes through a convection reflow oven during SMT assembly. It is one of the most influential process parameters for solder joint quality: too cold and joints don't form; too hot and components are damaged; too fast a ramp and solder balls, tombstoning, or voiding result.

Every assembly — every board, paste alloy, and component mix — needs a profile tuned to its specific requirements. The starting point is the solder paste manufacturer's datasheet, which defines the recommended process window. The endpoint is a thermocouple measurement at worst-case locations on a populated production board.

The Four Zones of a Reflow Profile

A standard convection reflow oven has four thermal zones. The oven sets heater temperatures and conveyor speed for each zone; the PCB's actual temperature profile depends on conveyor speed, zone length, and the board's thermal mass.

Zone 1 — Preheat (Ramp-Up)

ParameterSAC305 (lead-free)Sn63Pb37 (leaded)
Start temperatureAmbient (~25°C)Ambient (~25°C)
End temperature~150°C~100°C
Ramp rate1–3°C/s (typically)1–3°C/s (typically)

The preheat zone raises board temperature gradually from ambient. A controlled ramp serves two functions:

  1. Volatilises solvents — solder paste flux contains volatile solvents; driving them off slowly prevents spattering that deposits solder balls across the board.
  2. Reduces thermal shock — rapid temperature change stresses ceramic components (MLCC capacitors are particularly prone to micro-cracking) and can cause paste slump. Most assembly references recommend ≤3°C/s; faster than ~4°C/s is generally outside the acceptable process window for most components.

A rate of approximately 2°C/s is a practical starting point for most mixed SMT assemblies.

Zone 2 — Soak (Flux Activation)

ParameterSAC305 (lead-free)Sn63Pb37 (leaded)
Temperature range~150–200°C~100–160°C
Duration60–120 s (typically)60–90 s (typically)

The soak zone holds the board in the sub-liquidus temperature range. This serves two functions:

  1. Flux activation — flux chemistry becomes fully active in this range, removing oxide from pad copper and component terminals so solder can wet properly.
  2. Thermal equalisation — different component packages have very different thermal masses. A 60–120 s soak allows the entire board — large connectors, BGAs, tiny 0201 passives — to approach a similar temperature before entering the reflow zone. Without adequate soak time, low-thermal-mass components reach liquidus well before heavy ones, creating the gradient that causes tombstoning on small passives.

The soak temperature must stay below the alloy's liquidus temperature. Premature melting before all components are equalised produces exactly the defects the soak is designed to prevent.

Zone 3 — Reflow (Above Liquidus)

ParameterSAC305 (lead-free)Sn63Pb37 (leaded)
Liquidus temperature217°C183°C
Typical peak temperature235–250°C200–220°C
Minimum superheat above liquidus~15–20°C~15–20°C
Time above liquidus (TAL)30–90 s (per IPC-7530)20–60 s (typically)

In the reflow zone, board temperature rises above the alloy's liquidus temperature. Solder melts, flux-assisted wetting draws liquid solder onto pad copper and component terminals, and intermetallic bonds form.

Superheat margin: Peak temperature must be high enough above liquidus that the last joints to reach temperature — typically large pads on high-thermal-mass components over dense copper pours — do reach liquidus within the TAL window. A minimum of 15–20°C above liquidus is the common starting point. Assemblies with high thermal mass variation may need 20–30°C of superheat margin.

Component limits (J-STD-020): The upper peak temperature and TAL are constrained by component ratings. J-STD-020 defines the reflow conditions that moisture-sensitive devices can withstand. Most general-purpose SMT passives and ICs are rated to 260°C peak at 30 s TAL (MSL1 or MSL2 at 260°C). Sensitive components — certain crystals, electrolytic capacitors, MEMS sensors, tall connectors — may have lower ratings. The peak temperature must not exceed the lowest-rated component on the board. Review every component's datasheet, not just the ICs.

TAL (Time Above Liquidus): TAL is the time the solder spends in the liquid state. Longer TAL improves wetting on difficult surfaces (OSP finish, lightly oxidised pads) but increases thermal stress on components. Shorter TAL reduces thermal exposure but risks cold joints if the paste window requires more time. Per IPC-7530, 30–90 s is the typical target window for SAC305; the paste manufacturer's datasheet gives the authoritative recommended range. TAL is controlled primarily by conveyor speed — slowing the conveyor increases TAL at a given zone heater setting.

Zone 4 — Cooling

ParameterSAC305 (lead-free)Sn63Pb37 (leaded)
Cooling rate2–6°C/s (typically)1–4°C/s (typically)
Target exit temperatureBelow Tg of FR4 (~130–145°C)Below Tg of FR4

The cooling zone solidifies the solder joints. Cooling rate affects joint microstructure:

  • Faster cooling (within limits) produces finer grain structure, generally associated with better thermal fatigue resistance for lead-free alloys. Controlled forced-air cooling typically achieves 3–6°C/s.
  • Too-fast cooling thermal-shocks ceramic components — MLCC capacitors, crystal resonators, and chip ferrites can micro-crack if cooled too rapidly from peak temperature. Most guidelines specify ≤4–6°C/s as a practical maximum; check the most fragile component's datasheet for its specific thermal shock rating.
  • Too-slow cooling allows coarser grain growth and extends time at elevated temperature for sensitive components.

Active forced-air cooling at the oven exit is standard for lead-free profiles. The board should reach below the alloy's solidus before any mechanical handling — partially solid joints deform under conveyor belt stress.

Reading the Solder Paste Manufacturer's Datasheet

The parameters above are typical starting-point values. The solder paste datasheet is the authoritative reference for any specific paste product and alloy. Paste datasheets publish a reflow process window — a region on the time-temperature curve within which reliable joints consistently form. Key parameters to read:

ParameterWhere to find it
Recommended peak temperaturePaste datasheet profile diagram
Maximum peak temperaturePaste datasheet; also constrained by J-STD-020 per component
Soak zone temperature and durationPaste datasheet
TALPaste datasheet
Maximum ramp ratePaste datasheet
Alloy liquidus/solidusPaste datasheet or alloy technical note

Different alloys — SAC305, SAC0307, low-temperature Bi-Sn and Sn-Bi-Ag, Sn-Cu — have different profile requirements. Always start from the paste you are actually using, not a generic guideline.

Component-Level Constraints

Before finalising the profile, review:

  1. J-STD-020 MSL ratings — each component's datasheet or product page lists its moisture sensitivity level and the corresponding peak temperature and TAL it can tolerate during reflow (e.g. MSL2 at 260°C means 260°C peak for ≤30 s TAL). All components must be checked, including connectors, crystals, and passives — not just ICs.

  2. Electrolytic capacitors — the capacitor body has a rated operating temperature (typically 85°C or 105°C). The lead and pad will reach 240°C, but the body must not remain at that temperature long. Electrolytic capacitor datasheets specify a maximum reflow exposure condition; check it for each part.

  3. Board surface finish — HASL and ENIG surfaces are solderable across the standard lead-free process window. OSP (organic solderability preservative) has a narrower effective window: the OSP coating degrades with storage and with each thermal excursion, so controlling soak zone time and peak temperature more carefully is important for good wetting. See PCB surface finishes explained for the full surface finish comparison and its effects on assembly.

Validating the Profile with a Thermocouple Profiler

Setting oven zone temperatures and conveyor speed gives a programmed profile. Verifying it requires measuring actual board temperatures during a live oven run using a thermocouple profiler (oven profiler) — a data logger with K-type thermocouples that rides through the oven attached to the board.

Typical measurement points on a production board:

LocationWhy
Smallest passive component padFirst to reach liquidus; check for overshoot above component limit
Largest thermal-mass pad (connector body, large QFN, BGA corner ball)Last to reach liquidus; verify TAL is met here too
Board centreTypical representative mid-point
Board edgeMay lag or lead centre depending on oven heater uniformity
Most heat-sensitive componentVerify peak temperature stays within spec

The profiler generates a time-temperature curve for each thermocouple. Verify that:

  • All points remain within the paste manufacturer's recommended reflow window
  • All points meet the liquidus and TAL minimums
  • No point exceeds the lowest-rated component's peak temperature limit
  • Preheat ramp rate does not exceed ~4°C/s at any point
  • Cooling rate does not exceed the ceramic component limit

Adjust conveyor speed or zone heater temperatures to bring the slowest and fastest points simultaneously within the process window. This is the core of profile optimisation — the goal is a process window wide enough to cover board-to-board thermal variation in a production run.

Common Defects Caused by Profile Errors

DefectProfile causeFix
Solder ballsToo rapid preheat; solvents driven out violentlyReduce preheat ramp rate
Tombstoning (0402/0201 passives)Inadequate soak zone; thermal gradient across the componentExtend soak zone time; confirm thermal uniformity
Cold joints / poor wettingPeak too low or TAL too short; flux not fully activatedRaise peak temperature or slow conveyor to increase TAL
Voids (QFN, BGA thermal pads)Too rapid ramp through soak; trapped flux outgassingReduce ramp rate; extend soak; check stencil aperture design
Component damagePeak temperature exceeds component's J-STD-020 rated limitReduce peak temperature; verify all component ratings
MLCC micro-cracksCooling rate too fast; thermal shock to ceramic bodyReduce cooling rate; check oven exit air flow velocity

Voiding under QFN thermal pads and BGA balls deserves particular attention. The primary profile lever is a slow, extended soak zone; the stencil aperture design (segmented apertures on the thermal pad to allow flux gas escape paths) is the complementary fix. See solder paste and stencil design for stencil aperture guidance.

Design Considerations

  • Lead-free profiles run 30–40°C hotter than leaded: If your assembly mixes SAC305 paste with components that are only rated for leaded (183°C eutectic) reflow profiles, verify component ratings before committing to lead-free assembly. This situation occurs with older industrial or military-spec components.
  • Second reflow (double-sided boards): Components assembled in the first reflow pass experience a second thermal excursion during the bottom-side pass. Most ICs and passives tolerate two reflow cycles within their J-STD-020 rating. Heavy components on the bottom side during the second pass may drop if surface tension cannot support their weight when solder is liquid — plan component placement accordingly.
  • Board warp during soak: FR4 softens near its glass transition temperature (Tg — typically 130–145°C for standard FR4). Extended soak time above Tg on thin boards may cause warp, leading to component shift. High-Tg FR4 (Tg 150°C+) reduces this risk for demanding profiles.
  • Profile variation between oven units: The same nominal profile produces different actual board temperatures across different oven models, and as any oven ages (heater element degradation, conveyor wear). Re-profile whenever the oven is serviced, or if defect rates change unexpectedly in production.

If you're bringing up a new PCB assembly and need help validating your reflow process, Zeus Design's rapid prototyping service covers first-article assembly support and production-ready PCBA validation.

Common Mistakes

  • Using the same profile for every paste alloy — SAC305, Sn63Pb37, low-temperature Bi-Sn, and specialty alloys each require their own profile. The paste datasheet takes precedence over any generic guideline.
  • Setting the profile without validating on a loaded board — unpopulated boards and sparse prototype boards heat and cool differently from a dense production board. Thermocouple profiling must be done on a representative populated board.
  • Targeting the component's maximum J-STD-020 temperature — the rated maximum is not the target; it is the absolute limit. Design the profile to peak 15–30°C below the most sensitive component's rated maximum to leave a process margin for board-to-board variation.
  • Neglecting to bake moisture-sensitive components before reflow — components that have absorbed ambient moisture will outgas at liquidus temperature, causing package delamination, popcorning, or cracked device bodies. Follow J-STD-033 handling and baking requirements, particularly for ICs above MSL2.
  • Ignoring the cooling zone — most profile optimisation effort focuses on the reflow zone, but too-fast cooling is a common cause of MLCC micro-cracks and crystal failures that present as early field failures rather than immediate assembly rejects. Measure and validate the cooling rate as carefully as the peak temperature.

Frequently Asked Questions

What is time above liquidus (TAL) and why does it matter?
Time above liquidus (TAL) is the duration a solder joint spends above the alloy's liquidus temperature — 217°C for SAC305 (lead-free) and 183°C for Sn63Pb37 (leaded eutectic). TAL must be long enough for solder to fully wet the pad and component terminal, but short enough to stay within the thermal rating of every component on the board. IPC-7530 and paste manufacturer datasheets typically recommend 30–90 s TAL for SAC305. J-STD-020 defines the maximum TAL each moisture sensitivity level (MSL) component can tolerate. Too short TAL causes poor wetting (cold joints); too long degrades component reliability and can damage moisture-sensitive packages.
What peak temperature should I use for a lead-free reflow profile?
For SAC305 solder paste (the most common lead-free alloy), peak temperature at the board is typically 235–250°C — at least 15–20°C above the 217°C liquidus to ensure complete wetting across all pad and component thermal masses. The upper limit is set by the most temperature-sensitive component on the board, per its J-STD-020 MSL rating. Most standard SMT components (resistors, capacitors, common ICs) are rated to 260°C peak for 30 s TAL (MSL1 or MSL2). Crystals, electrolytic capacitors, MEMS sensors, and certain connectors may have lower limits that constrain maximum peak temperature. Always check the most sensitive component's datasheet before finalising the oven profile.
How does the reflow profile affect tombstoning of small passives?
Tombstoning occurs when one pad of a small passive (typically 0402 or smaller) reaches liquidus and its solder wets and pulls the component upright before the opposite pad reflows. A well-designed soak zone reduces tombstoning by allowing both pads and the component body to reach near-equal temperature before entering the reflow zone. A too-steep ramp through the soak creates thermal gradients that contribute to unequal wetting onset. Symmetrical footprint design (equal pad sizes, equal paste volume) and consistent component orientation also reduce tombstoning risk alongside the profile — see PCB component placement best practices for footprint-level guidance.

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