What Is a PCB Stack-Up, and How Do You Design One?

Detailed Explanation

A stack-up defines the vertical structure of a PCB: how many copper layers it has, what each layer is assigned to (signal routing, a ground plane, a power plane), and the dielectric material and thickness separating them. It's decided early in the design process because it directly constrains routing, plane integrity, and — for any high-speed or RF signal — the impedance that routing can achieve.

Layer count is the most visible stack-up decision, but assignment matters just as much: a four-layer board with two routing layers sandwiching a solid ground plane and a power plane behaves very differently, electrically, than a four-layer board with all four layers used for signal routing and no dedicated plane at all. The former gives every signal a clean, low-impedance return path; the latter saves nothing on cost but loses most of the EMI and signal-integrity benefit layer count was meant to buy.

Practical Examples

A common, well-proven four-layer stack-up for a mixed digital/analog board is: top signal layer, ground plane, power plane, bottom signal layer. This gives every signal on either outer layer a continuous, adjacent reference plane, which keeps return paths short and predictable — a major reason this configuration is a default starting point rather than something most designs need to deviate from.

A board with a high-speed differential pair (such as USB or a SerDes link) needs the stack-up decided before routing even starts, because the dielectric thickness between the signal layer and its reference plane is one of the variables that sets the controlled impedance of that trace — changing the stack-up after routing means re-deriving every impedance-critical trace width from scratch.

Design Considerations

• Decide plane assignment, not just layer count — a layer reserved for signal routing only helps if the adjacent layer actually provides a continuous reference plane for it.
• Loop in your fabrication house early — dielectric thickness, copper weight, and even some material options vary by manufacturer, and the stack-up you specify has to be something they can actually build within tolerance.
• Account for impedance requirements before finalising dielectric thickness — if any net needs controlled impedance, the stack-up's dielectric height between signal and reference plane is a direct input to that calculation, not an afterthought.
• Don't over-spec layer count "to be safe" — every additional layer adds cost and lead time; a stack-up should match the design's actual routing density and plane needs, not an arbitrary safety margin.
• Stack-up coordination with fabrication: Getting an accurate, buildable stack-up requires close coordination with the intended fab house — professional PCB design includes this fabrication-house alignment as a standard step before routing begins.

Common Mistakes

• Choosing layer count without assigning planes, ending up with the cost of a multi-layer board but little of its signal-integrity benefit.
• Finalising the stack-up after routing has already started, then discovering a controlled-impedance trace's width needs to change because the dielectric thickness wasn't fixed first.
• Assuming every fabrication house can build an identical stack-up — copper weight and dielectric availability vary, and a stack-up specified without checking can come back with substitutions that change its electrical properties.
• Splitting a ground plane into multiple isolated islands "for noise separation" without understanding the return-path consequences — see our PCB power and ground plane design guide for when (and when not) to do this.