Buck, Boost, or Buck-Boost? How to Choose a DC-DC Converter Topology

Detailed Explanation

Every DC-DC switching converter either steps voltage down (buck), steps it up (boost), or does both depending on operating conditions (buck-boost). The topology selection decision reduces to a single question: can your input voltage ever drop to or below your desired output voltage during normal operation?

If no — use a buck or boost depending on which direction you're converting.
If yes — use a buck-boost topology.

The Voltage Range Rule

This test eliminates most of the topology uncertainty in common designs. The remaining decision involves efficiency, component count, IC availability, and cost at your specific output voltage and current requirements.

Buck: Vin Always Greater Than Vout

A buck converter uses a high-side switch, an inductor, and a freewheeling diode (or synchronous low-side MOSFET) to step voltage down. In steady state:

Vout = Vin × D

where D is the duty cycle. The feedback loop adjusts D continuously to regulate Vout against line and load variation.

Typical applications:

• 12V supply → 3.3V MCU rail
• 5V USB input → 1.8V or 3.3V embedded system
• 24V industrial bus → 5V system rail
• 2-cell Li-ion pack (6–8.4V) → 5V or 3.3V output

Efficiency: typically 85–96% with modern synchronous rectification. The buck has no right-half-plane zero in its control loop, making compensation straightforward relative to a boost.

The constraint: the controller requires Vin − Vout ≥ the IC's dropout voltage (typically 0.3–1V for integrated synchronous bucks). If your minimum input drops to within this margin of Vout, the converter cannot regulate at minimum Vin.

Boost: Vin Always Less Than Vout

A boost converter stores energy in an inductor from the input during the switch-on phase, then releases it at higher voltage through a diode to the output. The transfer function is:

Vout = Vin ÷ (1 − D)

At D = 0.26 with Vin = 3.7V, Vout = 5.0V. At D = 0.5, Vout = 2 × Vin.

Typical applications:

• Single Li-ion cell (2.5–4.2V) → 5V USB output
• Single alkaline cell (0.9–1.5V) → 3.3V MCU supply
• 3.3V system rail → 5V for a legacy peripheral
• 1.2V NiMH cell → 3.3V or 5V

Efficiency: typically 83–95% with synchronous rectification. A right-half-plane zero limits the achievable closed-loop bandwidth — the feedback loop cannot respond as fast as a comparable buck, making compensation critical.

The constraint: a boost cannot regulate when Vin ≥ Vout. As Vin rises toward Vout, the required duty cycle approaches zero; most controllers have a minimum on-time that limits how low D can go, so the converter saturates or clips when Vin gets too close to Vout. A Li-ion cell → 5V output is always safe (cell maximum is 4.2V). A Li-ion cell → 3.3V output is not — the cell starts above 3.3V at full charge.

The Crossing Problem: When Vin Can Be Above or Below Vout

The most common scenario requiring a buck-boost topology is a single Li-ion cell powering a 3.3V rail:

A buck drops out as the cell approaches 3.3V. A boost cannot regulate when the cell is above 3.3V. The full discharge range requires a topology that handles both conditions.

The same problem arises with:

• Two AA alkaline cells (1.8–3.0V) → 2.5V or 3.3V rail
• Supercapacitor-backed supplies with a wide discharge range
• Automotive 12V nominal rails that dip to 6–9V during cold-crank and rise to 14.4V during charging

Buck-Boost Topologies

Three distinct topologies address the overlapping voltage range scenario, differing in output polarity, component count, control complexity, and efficiency.

Non-Inverting 4-Switch Buck-Boost

Four MOSFETs are arranged around a single inductor in an H-bridge configuration. The controller transitions between three modes automatically:

• Buck mode — when Vin is well above Vout (two of the four switches operate as a standard synchronous buck)
• Buck-boost mode — when Vin is near Vout (all four switches are active simultaneously)
• Boost mode — when Vin is well below Vout (two of the four switches operate as a standard synchronous boost)

Common ICs: TPS63020, TPS63070 (Texas Instruments); MAX77827 (Maxim); SY8301 (Silergy).

Advantages: Positive non-inverting output; smooth mode transitions with no output discontinuity; wide Vin/Vout range in a single compact IC.

Efficiency trade-off: in pure buck or boost mode, efficiency is comparable to a single-switch design (typically 87–94%). In the transition region near Vin ≈ Vout, all four switches are simultaneously active, increasing switching losses — efficiency typically dips to 80–88% in this region. For a Li-ion cell, this transition region is crossed quickly during normal discharge and rarely dominates the total energy budget.

SEPIC (Single-Ended Primary Inductance Converter)

A SEPIC uses two inductors (often wound on a single coupled core) and a series coupling capacitor to produce a positive, non-inverting output from a single switch and diode. Unlike the 4-switch topology, it handles the buck-boost range without four switches or a mode-transition control algorithm.

Advantages: Single main switch; positive non-inverting output that can be above or below Vin; compact with a coupled inductor.

Disadvantages: The series coupling capacitor carries the full inductor ripple current and must be carefully sized for ripple current rating, not just voltage. A diode rather than a synchronous MOSFET means higher conduction losses, making SEPIC efficiency typically lower than a 4-switch synchronous design above 2–3A. See inductor types and saturation current for how to evaluate saturation current ratings, which apply to both windings of a coupled SEPIC inductor.

Inverting Buck-Boost

An inverting buck-boost produces a negative output voltage — for example, +5V in, −12V out. The topology is structurally similar to a boost but with the diode reversed and the output referenced to the input positive rail rather than to ground.

When to use it: negative supply rails for dual-supply op-amp circuits, LCD bias voltages, or gate driver negative rails.

When not to use it: a positive output above your input — that needs SEPIC or 4-switch, not an inverting design. The output polarity is negative relative to input ground; a negative output rail referenced differently will not match your system requirements.

Topology Comparison

Efficiency ranges are typical for modern integrated IC designs; actual values depend on switching frequency, MOSFET RDS(on), inductor DCR, and load current. Cite specific IC datasheets and run your component values through the manufacturer's design tool before committing to a topology choice.

Design Considerations

• Measure Vin min and Vin max at the converter input pins, not at the source. Battery protection circuits, cable resistance, and connector voltage drops can reduce Vin min by 100–300 mV below the cell's rated cutoff voltage. Build in margin when evaluating whether your voltage ranges actually overlap — see how does a lithium-ion battery work? for the typical cell discharge curves and cutoff thresholds.
• Light-load efficiency is often more important than peak efficiency. Battery-powered products spend the majority of their life at low load. Check the IC's efficiency curve at 10–50 mA — or its quiescent current specification — rather than optimising for the peak efficiency at rated current. Most modern buck-boost ICs offer a power-save mode (PFM or pulse-skipping) that significantly improves light-load efficiency.
• The 4-switch efficiency dip at Vin ≈ Vout is usually brief. For a Li-ion cell, the cell voltage spends most of its discharge time either above 3.5V or below 3.3V — the transition region near the output rail voltage is traversed quickly. In most applications, the efficiency dip in this narrow crossing region is not the dominant loss. If your supply is a supercapacitor or a chemistry with a flat discharge curve, evaluate how much time the operating point spends near the crossing.
• The two-stage approach is sometimes more efficient at higher current. For a Li-ion cell → 3.3V above 2A, a boost to 5V followed by a synchronous buck to 3.3V can achieve better total efficiency than a 4-switch IC because both stages operate in their efficient pure-mode regions. The cost is two ICs, two inductors, and higher quiescent current — evaluate with your actual load profile.
• PCB layout principles carry over from buck and boost designs. Keep the switching loop tight, use low-ESR ceramic capacitors, and maintain a solid unbroken ground plane. For a 4-switch topology, all four switch nodes and the single inductor node need to be considered — the layout is more complex than a single-switch design. See how should you lay out a buck converter PCB? for the switching loop minimisation and decoupling principles that apply to all switching topologies.

For products where topology selection, component sizing, efficiency verification across the full operating range, and EMC-compliant layout all need to be delivered together, Zeus Design's engineering team handles the complete power design from topology selection through production-ready PCB: Zeus Design electronics design services.

Common Mistakes

• Using a boost for a Li-ion → 3.3V supply: a fresh Li-ion cell at 4.2V is above 3.3V, so the boost cannot regulate at full charge. Depending on the IC, the output either follows Vin passively through the freewheeling path (outputting ~4V instead of 3.3V), or the controller enters an undefined state. The product appears to work on a partially discharged battery but fails — often destructively — with a fresh cell.
• Choosing a buck-boost when the voltage ranges never actually overlap: if Vin min genuinely always exceeds Vout with margin, a simple buck is smaller, cheaper, and more efficient. Audit your actual voltage extremes — including source tolerance, cable drop, and protection circuit drop — before adding complexity.
• Sizing the SEPIC coupling capacitor by voltage only: the coupling capacitor in a SEPIC carries substantial AC ripple current from both inductor windings. A capacitor sized for its voltage rating but not its ripple current rating will overheat. Always verify the capacitor's ripple current rating against the calculated ripple, and use film or X7R ceramic types with adequate current handling.
• Confusing an inverting and a non-inverting buck-boost: an inverting buck-boost output is negative with respect to the input ground. If a schematic calls for a positive 5V rail that needs to be above and below the input, and an inverting topology is placed instead of a SEPIC or 4-switch design, the output will be −5V — a silent mistake that will almost certainly damage downstream components.
• Not accounting for minimum on-time at high Vin/Vout ratios: in the pure-buck mode of a 4-switch IC at very high Vin relative to Vout, duty cycle becomes very low. Most controllers have a minimum on-time (typically 50–200 ns) that limits the maximum achievable Vin/Vout ratio. Verify the IC's minimum on-time specification at your switching frequency and check that it supports your maximum input voltage.