How to Export Gerber Files from KiCad for PCB Fabrication

Detailed Explanation

Generating a complete PCB fabrication package from KiCad requires three separate export steps: Gerber files, drill files, and assembly files. Each step uses a different dialog, and all three must use the same coordinate origin setting to ensure drill holes align with copper pads in the manufactured board.

Before generating any output, complete a final Inspect → Design Rules Checker run and resolve every error. Output files must reflect a DRC-clean layout — see What Are PCB Design Rules (DRC)? for a breakdown of common error types and how to fix them. For a complete KiCad PCB design workflow overview from schematic entry through to the fabrication output step, see How to Use KiCad: Schematic Entry and PCB Layout Workflow.

Setting Up an Output Directory

Before plotting, create a dedicated subfolder within your KiCad project directory for fabrication outputs — for example, gerbers/ or fab/. Enter this path in the Gerber plot dialog's Output directory field. Separating output files from the source .kicad_pcb file prevents accidental overwrites and simplifies archiving: the contents of this folder are what get compressed and submitted to the fab house.

Generating Gerber Files

Open the Gerber plot dialog via File → Fabrication Outputs → Gerbers.

Layer selection

Select the layers that fully describe the manufactured board. For a standard 2-layer board:

For a 4-layer board, also select In1.Cu and In2.Cu (or the inner layer names as configured in Board Setup → Board Stackup). Verify that the number of selected copper layers matches the layer count specified in your fab house order — a missing inner layer produces no DRC error, is invisible in the PCB canvas, but is immediately apparent in GerbView.

Layers to omit from the fabrication submission:

• F.Fab / B.Fab — assembly documentation layers for the pick-and-place operator; not required for bare board fabrication
• F.Courtyard / B.Courtyard — component clearance boundaries; include only if the assembly house explicitly requests them
• User.* layers — design notes and annotations; not for fab submission

Plot settings

In the right panel of the plot dialog:

• Format: Gerber X2 — the current standard, accepted by all major modern fab houses. Embeds layer function attributes directly in each Gerber file, enabling automated layer identification.
• Coordinate format: 4.6 metric — nanometre resolution; correct for virtually all modern board designs.
• Check zone fills before plotting — enable this. Copper pours that have not been refilled since the last placement or routing change produce stale or missing copper in the output.
• Use Protel filename extensions — leave disabled. Protel naming (.GTL, .GBL, etc.) is a legacy convention; KiCad's standard underscore naming (F_Cu.gbr, B_Cu.gbr, etc.) is recognised by all major modern fab houses.
• Generate Gerber job file (.gbrjob) — enable. The job file documents the complete fabrication package and allows Gerber viewers and fab portals to auto-assign layers by function.

Set the coordinate origin to Drill/Place File Origin (detailed below — the drill file dialog must use the same setting).

Click Plot to write the Gerber files to the output directory.

Setting the Coordinate Origin

The coordinate origin used for Gerber files and the coordinate origin used for the drill file must match exactly. A mismatch produces drill holes that appear offset from copper pads in the Gerber viewer — and in the manufactured board.

KiCad provides a Drill/Place File Origin marker you can position anywhere on the board canvas. To place it: in the PCB Editor, open the Place menu and select Drill/Place File Origin, then click to position the marker. The conventional location is the lower-left corner of the Edge.Cuts board outline, establishing a 0,0 reference at the board edge. Once placed, select Drill/Place File Origin in both the Gerber plot dialog and the drill file dialog to ensure all output files share the same reference point.

Generating the Drill File

The drill file is a separate export — it is not produced by the Gerber plot dialog. Navigate to File → Fabrication Outputs → Drill Files.

Generate both the PTH (plated through-hole) and NPTH (non-plated) drill files. If the board has no non-plated holes — no mechanical or mounting holes without copper — the NPTH file will be empty. Include it in the submission zip anyway to make the absence of NPTH holes explicit to the fab house.

Click Generate Drill File to write <project>-PTH.drl and <project>-NPTH.drl to the output directory.

Generating Assembly Files

For PCBA orders requiring SMT assembly, generate two additional files from File → Fabrication Outputs:

Component Placement (pick-and-place file) — lists every component's reference designator, value, footprint, X/Y centroid position, rotation in degrees, and board side (Front/Back). The assembly house's pick-and-place machine programming software uses this file to drive placement. Export as CSV. Centroid coordinates are relative to the same origin used for Gerbers and drill — consistent origins matter here too.

BOM — KiCad's built-in BOM generator produces a CSV listing reference designators, values, and footprint names. For a BOM suitable for component purchasing, populate the MPN (manufacturer part number), Manufacturer, and Supplier fields in each component's symbol properties in the Schematic Editor before generating. KiCad also supports external BOM plugins available via Tools → Plugin and Content Manager (the Interactive HTML BOM plugin is widely used for assembly reference).

Verifying with GerbView

Before uploading to any fab house, open the Gerber viewer via File → Open Gerber Viewer in the KiCad project manager. Load all Gerber files and both drill files, then confirm:

• Layer count — the correct number of copper layers is present and each file loads without error
• Drill hole alignment — drill holes fall in the centre of their copper pads; offset drills indicate the Gerber and drill file coordinate origins do not match
• Board outline — Edge.Cuts is a single, fully closed polygon; any gap or open edge segment will cause the fab to reject the file or cut incorrectly
• Solder mask polarity — pads should appear as open windows in the mask layer (transparent, exposing the copper beneath); solid-filled pads indicate inverted rendering or a misconfigured mask
• Silkscreen — no silkscreen ink overlapping exposed pads, where it would interfere with soldering

Most major fab houses also provide a web-based Gerber viewer on their order portal — use it as a second verification pass. Discrepancies between GerbView and the fab portal viewer are rare but worth catching before placing the order.

Packaging for Submission

Compress the output directory into a single .zip archive containing all Gerber files, both drill files, and the .gbrjob file. Do not include the .kicad_pcb source file in the fab submission archive. For assembly orders, include the pick-and-place CSV and BOM either in the same archive or separately, per the assembly house's instructions.

For boards with controlled-impedance traces, include a stack-up specification alongside the Gerbers — Gerber files carry only copper geometry, not layer order, copper weight, or dielectric material.

Design Considerations

• Fill zones before plotting. Press B (Fill All Zones) in the PCB Editor immediately before generating output files. Copper pours are not updated automatically when components move or traces reroute. Plotting without a fresh fill produces stale or missing copper in the Gerber output — invisible in the canvas view but immediately visible in GerbView.
• Confirm the stack-up before generating outputs. For anything beyond a simple 2-layer board, provide an explicit stack-up specification to the fab house alongside the Gerbers — layer order, copper weight, dielectric material, and any impedance targets. See What Is a PCB Stack-Up? for what needs to be specified and why.
• Verify inner layers on 4-layer boards. A missing inner copper layer produces no DRC error and looks correct in the PCB canvas. The missing file only surfaces in GerbView when the expected Gerber is absent from the output directory. For 4-layer designs, confirm that four copper Gerber files are present before submitting.
• Import the fab's design rule file before the final DRC. Most major fab houses publish .kicad_dru files defining their manufacturing capabilities. Import via File → Board Setup → Design Rules → Import Rules to ensure the final DRC uses the fab's actual constraints. See the forum thread on annular ring and acid-trap DRC failures in KiCad for examples of violations that a fab-specific rule file would catch.
• Gerber X2 is the default — only switch to RS-274X if the fab asks. The two formats are geometrically identical; the difference is embedded metadata. Switching requires unchecking one option in the plot dialog and replotting — it takes seconds.
• For designs requiring DFM review, controlled-impedance verification, or a complete fabrication package prepared to production standards, Zeus Design's PCB design service delivers board packages ready for fab submission, including stack-up drawings and impedance control notes.

Common Mistakes

• Not generating the drill file separately. The Gerber Plot dialog does not produce drill data — only the dedicated Drill Files dialog does. Submitting Gerbers without a drill file results in a bare board with no holes. Most fab houses catch this and reject the submission, but catching it in GerbView before uploading is faster and less disruptive.
• Mismatched coordinate origins between Gerbers and drill file. If the Gerber plot uses Drill/Place File Origin and the drill file dialog uses a different origin, drill holes appear offset from pads. Confirm both dialogs use the same origin setting before generating output.
• Including F.Fab and B.Fab in the submission. Fab documentation layers are not manufacturing data. Submitting them alongside copper layers can confuse automated layer identification at some fab portals, which may attempt to treat them as additional copper layers. Deselect F.Fab and B.Fab in the plot dialog layer list.
• Plotting before zone refill. Copper pour areas are not updated automatically when components are moved or traces rerouted. Plotting without running Fill All Zones (B) first produces Gerbers showing the copper fill state from before the last layout change — potentially missing portions of a ground plane or power pour.
• Not verifying in GerbView before submission. Gerber configuration errors — wrong coordinate origin, missing copper layer, incorrect solder mask polarity, open board outline — are invisible in the KiCad PCB Editor canvas. Skipping GerbView verification risks a rejected submission or a manufactured board that does not match the design.
• Omitting the NPTH drill file when there are no non-plated holes. Most fab houses handle a missing NPTH file cleanly, but including an empty file removes any ambiguity about whether non-plated holes were deliberately absent or accidentally missed.